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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2015-09-09intel/model_2065x/Kconfig: Don't use LAPIC_MONOTONIC_TIMERMartin Roth
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-08-25Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth
2015-07-29Add SoC specific microcode update check in ramstageRizwan Qureshi
2015-07-07x86: Drop -Wa,--divideStefan Reinauer
2015-06-10model_2065x: Use common i945-ivy TSEG SMM init.Vladimir Serbinenko
2015-06-10model_206ax: Fix APIC map when HT is disabled.Vladimir Serbinenko
2015-06-10fsp_model_206ax: Use common i945-ivy tseg SMM init.Vladimir Serbinenko
2015-06-09stage_cache: use cbmem init hooksAaron Durbin
2015-06-09Create i945-ivy smm tseg init based on ivy code.Vladimir Serbinenko
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-06-05device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens
2015-06-04Remove address from GPLv2 headersPatrick Georgi
2015-06-02cbfs: new API and better program loadingAaron Durbin
2015-05-28smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko
2015-05-28Migrate fsp_206ax to SMM_MODULESVladimir Serbinenko
2015-05-28Migrate 2065x to SMM_MODULESVladimir Serbinenko
2015-05-28Migrate 206ax to SMM_MODULESVladimir Serbinenko
2015-05-28intel: Remove pstate_coord_type.Vladimir Serbinenko
2015-05-27Move TPM code out of chromeosVladimir Serbinenko
2015-05-26acpigen: Remove all explicit length trackingVladimir Serbinenko
2015-05-26speedstep: Don't supply weak get_cst_entries.Vladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-19intel/haswell: Drop MONOTONIC_TIMER_MSRPatrick Georgi
2015-05-13Include back the 306ax microcode again.Vladimir Serbinenko
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-05-05haswell: Link stage_cache_external_region into ramstage, tooSol Boucher
2015-05-04cpu: get rid of socket source codeStefan Reinauer
2015-04-30cpu/intel/haswell: remove dependency on socket_rpga989Matt DeVillier
2015-04-28Kconfig whitespace fixesMartin Roth
2015-04-28Fix some minor Kconfig issuesMartin Roth
2015-04-24fsp: Move fsp to fsp1_0Marc Jones
2015-04-22coreboot: common stage cacheAaron Durbin
2015-03-28build system: normalize linker script file namesPatrick Georgi
2015-03-17haswell: Fix monotonic timer integrationStefan Reinauer
2015-03-13cpu/intel/2065x: add define for MSR IA32_FERR_CAPABILITYAlexander Couzens
2015-03-10x86 cache-as-ram: Remove BROKEN_CAR_MIGRATE optionKyösti Mälkki
2015-02-28cpu/intel: (non-FSP) Remove microcode updates from treeAlexandru Gagniuc
2015-02-28cpu/intel (non-FSP): Use microcode from blobs repositoryAlexandru Gagniuc
2015-02-18cpu/intel/model_2065x|nehalem: remove unsupported MSR_PP0/MSR_PP1Alexander Couzens
2015-02-16acpi: Generate valid ACPI processor objectsTimothy Pearson
2015-02-11cpu/intel: >= nehalem: add comments to msr finalize'sAlexander Couzens
2015-02-06FSP & CBMEM: Fix broken cbmem CAR transition.Martin Roth
2015-01-31intel/model_2065x: update microcodeNicolas Reinecke
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
2015-01-27CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEMKyösti Mälkki
2015-01-27vboot2: add verstageStefan Reinauer
2015-01-03intel/model_206ax: update microcodeNicolas Reinecke
2014-12-30intel CAR: Fix DCACHE_RAM_BASE for old socketsKyösti Mälkki
2014-12-19intel/truxton: Add dummy cache-as-ram regionKyösti Mälkki
2014-12-16Intel FSP: Move to DYNAMIC_CBMEMKyösti Mälkki
2014-12-05FSP platform microcode: Update to remove Kconfig variableMartin Roth
2014-12-03i945: Consolidate acpi/platform.aslVladimir Serbinenko
2014-12-02Replace hlt with halt()Patrick Georgi
2014-11-30Replace hlt() loops with halt()Patrick Georgi
2014-11-19acpigen: Add and use acpigen_write_method.Vladimir Serbinenko
2014-11-15chromeos: provide stub functions for !CONFIG_VBOOT_VERIFY_FIRMWAREAaron Durbin
2014-11-09haswell: Move to implicit length patchingVladimir Serbinenko
2014-11-09ibexpeak, bd82x6x: Move to implicit length patchingVladimir Serbinenko
2014-11-08fsp_rangeley: Switch to per-device ACPIVladimir Serbinenko
2014-11-07cpu/intel/fsp_model_406dx: Invaild include pathEdward O'Callaghan
2014-10-29cpu/intel: Add configuration for socket LGA1155Damien Zammit
2014-10-27{arch,cpu,drivers,ec}: Don't hide pointers behind typedefsEdward O'Callaghan
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-10-19haswell baytrail: Enable RELOCATABLE_RAMSTAGEKyösti Mälkki
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-09-12cpu/intel/fsp_model_206ax/model_206ax_init.c: Correct commentPaul Menzel
2014-08-30sandybridge: Add native sandybridgeVladimir Serbinenko
2014-08-18cpu/intel/fsp_model_406dx: code cleanupMartin Roth
2014-08-12cpu/intel/XXX/acpi.c: Fix coding style violationMartin Roth
2014-08-10model_106cx: don't blindly set Kconfig settingsAaron Durbin
2014-08-10cpu/intel/model_1067x: avoid null-pointer dereferencePatrick Georgi
2014-08-04cpu/intel: Fix out-of-bounds read due to off-by-one in conditionEdward O'Callaghan
2014-07-30model_206ax_init.c: Trivial - fix indentEdward O'Callaghan
2014-07-30cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000)Martin Roth
2014-07-30cpu/intel/model_2065x/model_2065x_init.c: Remove dead codeEdward O'Callaghan
2014-07-29sandy/ivybridge: Native raminit.Vladimir Serbinenko
2014-07-23cpu/intel/fsp_model_206ax/model_206ax_init.c: Use macro `IS_ENABLED()`Paul Menzel
2014-07-19intel/model_2065x: Remove dead code.Vladimir Serbinenko
2014-07-17cpu,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-10intel/haswell: add vmx support w/Kconfig optionMatt DeVillier
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-05Drop redundant select CACHE_AS_RAMKyösti Mälkki
2014-07-05intel: Make monotonic timer a first class citizenEdward O'Callaghan
2014-06-17intel/model_2065x: Add 20652 microcode.Vladimir Serbinenko
2014-05-30cpu/intel/fsp_model_206ax: change realpath to readlinkMartin Roth
2014-05-17build: separate CPPFLAGS from CFLAGSPatrick Georgi
2014-05-17build: CPPFLAGS is more common than INCLUDESPatrick Georgi
2014-05-13cpu/intel: Add CPU socket rPGA988BZaolin
2014-05-10Replace SERIAL_CPU_INIT with PARALLEL_CPU_INITKyösti Mälkki
2014-05-09cougar_canyon2: Switch CPU/NB/SB to the shared FSP codeMartin Roth
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-05haswell: move to mp_init libraryAaron Durbin
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-04-26Rename coreboot_ram stage to ramstageFurquan Shaikh
2014-04-26Get rid of HAVE_INIT_TIMER config optionFurquan Shaikh
2014-03-20rmodules: use rmodtool to create rmodulesAaron Durbin
2014-03-16Make POST device configurable.Idwer Vollering
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
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