| Age | Commit message (Expand) | Author |
|---|---|---|
| 2017-03-16 | cpu/intel: Wrap lines at 80 columns | Lee Leahy |
| 2017-03-16 | cpu/intel: Fix the spacing issues | Lee Leahy |
| 2017-03-16 | cpu/intel: Indent with tabs | Lee Leahy |
| 2015-12-06 | Remove #ifdef checks on Kconfig symbols | Martin Roth |
| 2015-11-16 | intel/fsp_rangeley: Load BSP microcode in bootblock | David Guckian |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
| 2015-10-14 | Revert "Remove FSP Rangeley SOC and mohonpeak board support" | Martin Roth |
| 2015-10-03 | Remove FSP Rangeley SOC and mohonpeak board support | Alexandru Gagniuc |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2014-11-07 | cpu/intel/fsp_model_406dx: Invaild include path | Edward O'Callaghan |
| 2014-07-30 | cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000) | Martin Roth |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |