coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-12-06	PCI ops: Define read-modify-write routines globally	Kyösti Mälkki
2016-12-06	intel PCI ops: Remove explicit PCI MMCONF access	Kyösti Mälkki
2016-12-06	riscv: Stub out sbi_(un)mask_interrupt	Jonathan Neuschäfer
2016-12-06	arch/riscv/mcall.c: Return the correct memory base and size	Jonathan Neuschäfer
2016-12-01	arch/x86: cache postcar in stage cache	Aaron Durbin
2016-12-01	romstage_handoff: add helper to determine resume status	Aaron Durbin
2016-11-28	Build system: Update HAVE_CMOS_DEFAULT	Martin Roth
2016-11-24	arch/x86/acpigen: Write DSM method with multiple UUID's	Naresh G Solanki
2016-11-21	arch/x86: don't create new gdt in cbmem for relocatable ramstage	Aaron Durbin
2016-11-20	riscv: map first 4GiB of physical address space	Ronald G. Minnich
2016-11-20	arch/x86 GDT: Fix orphan debug output	Kyösti Mälkki
2016-11-17	arch/x86/acpigen: Implement acpigen functions to return integer & string	Naresh G Solanki
2016-11-17	arm64: arm_tf: Do not build raw bl31.bin binary	Julius Werner
2016-11-17	arch/x86/acpigen: acpigen buffer size fix	Naresh G Solanki
2016-11-16	arch/x86/acpigen: Fix acpigen for If (Lequal (...))	Furquan Shaikh
2016-11-14	riscv: add a variable to control trap management	Ronald G. Minnich
2016-11-13	riscv: change payload() to pass the config string pointer as arg0	Ronald G. Minnich
2016-11-12	riscv: start to use the configstring functions	Ronald G. Minnich
2016-11-09	ACPI S3: Remove HIGH_MEMORY_SAVE where possible	Kyösti Mälkki
2016-11-07	arch/x86/acpigen: Add OperationRegion & Field method	Naresh G Solanki
2016-11-07	riscv: Unify SBI call implementations under arch/riscv/	Jonathan Neuschäfer
2016-11-02	riscv: Add a bandaid for the new toolchain	Ronald G. Minnich
2016-10-25	arch/x86/acpigen_dsm: Add support for DSM types	Furquan Shaikh
2016-10-25	arch/x86/acpigen: Add support for _DSM method generation	Furquan Shaikh
2016-10-25	arch/x86/acpigen: Add more functions to ACPIGEN library	Furquan Shaikh
2016-10-24	RISCV: Clean up the common architectural code	Ronald G. Minnich
2016-10-24	arch/x86/acpigen: Add support for interacting with GPIOs	Furquan Shaikh
2016-10-24	arch/x86/acpigen: Add new functions to acpigen library	Furquan Shaikh
2016-10-24	arch/x86/acpigen: Clean up acpigen library	Furquan Shaikh
2016-10-18	arch/riscv: In trap handler, don't print SP twice	Jonathan Neuschäfer
2016-10-15	arch/riscv: Visually align trap frame information	Jonathan Neuschäfer
2016-10-15	riscv: Use the generic src/lib/bootblock.c	Jonathan Neuschäfer
2016-10-15	arch/riscv: Remove unused bootblock_simple.c	Jonathan Neuschäfer
2016-10-15	riscv: Clean up {qemu,spike}_util	Jonathan Neuschäfer
2016-10-15	riscv and power8: Convert printk/while(1) to die	Jonathan Neuschäfer
2016-10-07	src/arch: Remove whitespace after sizeof	Elyes HAOUAS
2016-10-07	x86/acpi_device: Add support for GPIO output polarity	Furquan Shaikh
2016-10-07	x86/acpi_device: Fix writing of array property	Furquan Shaikh
2016-10-07	RISCV: update the encoding.h file.	Ronald G. Minnich
2016-10-06	arm64: Use 'payload' format for ATF instead of 'stage'	Simon Glass
2016-09-27	x86: acpi: Use GOOG ID for coreboot table	Duncan Laurie
2016-09-21	x86: acpi: Add function for querying GPE status	Duncan Laurie
2016-09-21	Makefiles: update cbfs types from bare numbers to values	Martin Roth
2016-09-20	arm_tf: Fix code style nits and comments	Simon Glass
2016-09-19	Revert "x86: acpi: Add function for querying GPE status"	Duncan Laurie
2016-09-19	x86: acpi: Add function for querying GPE status	Duncan Laurie
2016-09-19	arch/x86,lib: make cbmem console work in postcar stage	Aaron Durbin
2016-09-19	arch/x86: move postcar main logic into C	Aaron Durbin
2016-09-15	arch/acpi_ivrs.h: Update 8-byte IVRS entry values	Martin Roth
2016-09-12	src/arch: Improve code formatting	Elyes HAOUAS
2016-09-12	arch/arm: Add armv7-r configuration	Hakim Giydan
2016-09-12	arch/x86: Utilize additional MTRRs in postcar_frame_add_mtrr	Rizwan Qureshi
2016-09-12	arch/x86: Always compile postcar library in romstage	Rizwan Qureshi
2016-09-07	include/arch/acpi.h: change IVRS efr field to iommu_feature_info	Martin Roth
2016-09-07	x86/acpi.c: use #define for IVRS revision field	Martin Roth
2016-09-07	arch/x86/include: Add #defines for IVRS tables	Martin Roth
2016-09-04	arch/acpi.h: add #if guard to handle the absence of device_t type	Antonello Dettori
2016-08-29	arch/riscv: Add missing "break;"	Jonathan Neuschäfer
2016-08-28	src/arch: Add required space before opening parenthesis '('	Elyes HAOUAS
2016-08-28	src/arch: Capitalize CPU and ACPI	Elyes HAOUAS
2016-08-23	arch/riscv: Add functions to read/write memory on behalf of supervisor/user mode	Jonathan Neuschäfer
2016-08-23	arch/riscv: Map the kernel space into RAM (2GiB+)	Jonathan Neuschäfer
2016-08-23	arch/riscv: Implement the SBI again	Jonathan Neuschäfer
2016-08-23	arch/riscv: Enable U-mode/S-mode counters (stime, etc.)	Jonathan Neuschäfer
2016-08-23	arch/riscv: Fix unaligned memory access emulation	Jonathan Neuschäfer
2016-08-23	arch/riscv: Delegate exceptions to supervisor mode if appropriate	Jonathan Neuschäfer
2016-08-23	arch/riscv: Print the page table structure after construction	Jonathan Neuschäfer
2016-08-23	arch/arm & arm64: Remove unnecessary whitespace before "\n"	Elyes HAOUAS
2016-08-15	arch/riscv: Improve and refactor trap handling diagnostics	Jonathan Neuschäfer
2016-08-15	arch/riscv: Set the stack pointer upon trap entry	Jonathan Neuschäfer
2016-08-11	arch/riscv: Fix the page table setup code	Jonathan Neuschäfer
2016-08-11	arch/riscv: Update encoding.h and dependent files	Jonathan Neuschäfer
2016-08-06	acpi: Generate object for coreboot table region	Duncan Laurie
2016-08-04	src/arch/riscv/id.S: Don't hardcode the strings	Jonathan Neuschäfer
2016-08-03	ACPI: Add code to create root port entry in DMAR table	Werner Zeh
2016-08-03	ACPI: Add code to include ATSR structure in DMAR table	Werner Zeh
2016-08-02	arch/riscv: Add include/arch/barrier.h	Jonathan Neuschäfer
2016-08-01	Remove non-ascii & unprintable characters	Martin Roth
2016-08-01	arch/x86: Enable postcar console	Lee Leahy
2016-08-01	arch/x86: Display MTRRs after MTRR update in postcar	Lee Leahy
2016-07-31	src/arch: Capitalize CPU, RAM and ROM	Elyes HAOUAS
2016-07-28	arch/riscv: Refactor bootblock.S	Jonathan Neuschäfer
2016-07-28	arch/riscv: Only initialize virtual memory if it's available	Jonathan Neuschäfer
2016-07-28	arch/riscv: Remove spinlock code from atomic.h	Jonathan Neuschäfer
2016-07-27	arch/x86: Add bootblock and postcar support for SOC MTRR access	Lee Leahy
2016-07-26	arch/x86: Generate a map file for the postcar stage	Lee Leahy
2016-07-26	arch/x86: Organize ramstage to match other stages	Lee Leahy
2016-07-26	arch/x86: Move romstage files into romstage section	Lee Leahy
2016-07-26	arch/x86: Move postcar stage commands into place	Lee Leahy
2016-07-19	arch/riscv: Enable unaligned load handling	Jonathan Neuschäfer
2016-07-18	arch/riscv: Remove enter_supervisor	Jonathan Neuschäfer
2016-07-18	arch/riscv: Change all eret instructions to .word 0x30200073 (mret)	Jonathan Neuschäfer
2016-07-17	acpi: Change API called to write the name for ACPI_DP_TYPE_CHILD	Harsha Priya
2016-07-15	arch/x86: provide common Intel ACPI hardware definitions	Aaron Durbin
2016-07-15	arch/x86: provide common ACPI_Sx constants	Aaron Durbin
2016-07-14	spike-riscv: Look for the CBFS in RAM	Jonathan Neuschäfer
2016-07-14	arch/riscv: Unconditionally start payloads in machine mode	Jonathan Neuschäfer
2016-07-08	acpi: Change device properties to work as a tree	Duncan Laurie
2016-07-07	acpigen_write_package: Return pointer to package element counter	Duncan Laurie
2016-07-02	acpi_device: Have acpi_device_scope() use a separate buffer	Duncan Laurie