| Age | Commit message (Expand) | Author |
|---|
| 2017-11-07 | arch/riscv: gettimer: Don't use the config string | Jonathan Neuschäfer |
| 2017-11-07 | arch/riscv: Drop mret workaround | Jonathan Neuschäfer |
| 2017-11-07 | arch/riscv: mprv_read_*: Mark result as earlyclobber | Jonathan Neuschäfer |
| 2017-11-07 | arch/riscv: Fix return type of mprv_read_u64 | Jonathan Neuschäfer |
| 2017-09-27 | arch/riscv: hls_init: Initialize time{,cmp} with dummy pointers | Jonathan Neuschäfer |
| 2017-09-27 | arch/riscv: Document mprv_{read,write}_* functions | Jonathan Neuschäfer |
| 2017-09-27 | arch/riscv: trap handler: Print load/store access width in bits | Jonathan Neuschäfer |
| 2017-09-26 | riscv: Update register address | wxjstz |
| 2017-07-25 | src/arch: Fix checkpatch warning: no spaces at the start of a line | Martin Roth |
| 2017-07-07 | arch/*: Update Kconfig symbol usage | Martin Roth |
| 2017-06-07 | src: change coreboot to lowercase | Martin Roth |
| 2017-05-30 | arch: Unify basic cache clearing API | Julius Werner |
| 2017-02-20 | riscv: Suppress invalid coverity errors | Martin Roth |
| 2017-01-16 | riscv: Move mcall numbers to mcall.h, adjust their names | Jonathan Neuschäfer |
| 2017-01-16 | riscv: get SBI calls to work | Ronald G. Minnich |
| 2016-12-20 | riscv: enable counters via m[us]counteren | Ronald G. Minnich |
| 2016-12-18 | riscv: Add support for timer interrupts | Ronald G. Minnich |
| 2016-12-06 | riscv: Stub out sbi_(un)mask_interrupt | Jonathan Neuschäfer |
| 2016-12-06 | arch/riscv/mcall.c: Return the correct memory base and size | Jonathan Neuschäfer |
| 2016-11-20 | riscv: map first 4GiB of physical address space | Ronald G. Minnich |
| 2016-11-14 | riscv: add a variable to control trap management | Ronald G. Minnich |
| 2016-11-13 | riscv: change payload() to pass the config string pointer as arg0 | Ronald G. Minnich |
| 2016-11-12 | riscv: start to use the configstring functions | Ronald G. Minnich |
| 2016-11-07 | riscv: Unify SBI call implementations under arch/riscv/ | Jonathan Neuschäfer |
| 2016-11-02 | riscv: Add a bandaid for the new toolchain | Ronald G. Minnich |
| 2016-10-24 | RISCV: Clean up the common architectural code | Ronald G. Minnich |
| 2016-10-18 | arch/riscv: In trap handler, don't print SP twice | Jonathan Neuschäfer |
| 2016-10-15 | arch/riscv: Visually align trap frame information | Jonathan Neuschäfer |
| 2016-10-15 | riscv: Use the generic src/lib/bootblock.c | Jonathan Neuschäfer |
| 2016-10-15 | arch/riscv: Remove unused bootblock_simple.c | Jonathan Neuschäfer |
| 2016-10-15 | riscv: Clean up {qemu,spike}_util | Jonathan Neuschäfer |
| 2016-10-15 | riscv and power8: Convert printk/while(1) to die | Jonathan Neuschäfer |
| 2016-10-07 | RISCV: update the encoding.h file. | Ronald G. Minnich |
| 2016-09-12 | src/arch: Improve code formatting | Elyes HAOUAS |
| 2016-08-29 | arch/riscv: Add missing "break;" | Jonathan Neuschäfer |
| 2016-08-23 | arch/riscv: Add functions to read/write memory on behalf of supervisor/user mode | Jonathan Neuschäfer |
| 2016-08-23 | arch/riscv: Map the kernel space into RAM (2GiB+) | Jonathan Neuschäfer |
| 2016-08-23 | arch/riscv: Implement the SBI again | Jonathan Neuschäfer |
| 2016-08-23 | arch/riscv: Enable U-mode/S-mode counters (stime, etc.) | Jonathan Neuschäfer |
| 2016-08-23 | arch/riscv: Fix unaligned memory access emulation | Jonathan Neuschäfer |
| 2016-08-23 | arch/riscv: Delegate exceptions to supervisor mode if appropriate | Jonathan Neuschäfer |
| 2016-08-23 | arch/riscv: Print the page table structure after construction | Jonathan Neuschäfer |
| 2016-08-15 | arch/riscv: Improve and refactor trap handling diagnostics | Jonathan Neuschäfer |
| 2016-08-15 | arch/riscv: Set the stack pointer upon trap entry | Jonathan Neuschäfer |
| 2016-08-11 | arch/riscv: Fix the page table setup code | Jonathan Neuschäfer |
| 2016-08-11 | arch/riscv: Update encoding.h and dependent files | Jonathan Neuschäfer |
| 2016-08-04 | src/arch/riscv/id.S: Don't hardcode the strings | Jonathan Neuschäfer |
| 2016-08-02 | arch/riscv: Add include/arch/barrier.h | Jonathan Neuschäfer |
| 2016-07-28 | arch/riscv: Refactor bootblock.S | Jonathan Neuschäfer |
| 2016-07-28 | arch/riscv: Only initialize virtual memory if it's available | Jonathan Neuschäfer |
| 2016-07-28 | arch/riscv: Remove spinlock code from atomic.h | Jonathan Neuschäfer |
| 2016-07-19 | arch/riscv: Enable unaligned load handling | Jonathan Neuschäfer |
| 2016-07-18 | arch/riscv: Remove enter_supervisor | Jonathan Neuschäfer |
| 2016-07-18 | arch/riscv: Change all eret instructions to .word 0x30200073 (mret) | Jonathan Neuschäfer |
| 2016-07-14 | spike-riscv: Look for the CBFS in RAM | Jonathan Neuschäfer |
| 2016-07-14 | arch/riscv: Unconditionally start payloads in machine mode | Jonathan Neuschäfer |
| 2016-06-28 | riscv/bootblock.S: Register machine-mode, not supervisor-mode trap handler | Jonathan Neuschäfer |
| 2016-06-28 | arch/riscv: Show fault PC and load address on load access faults | Jonathan Neuschäfer |
| 2016-06-28 | arch/riscv: Move _start to the beginning of the bootblock | Jonathan Neuschäfer |
| 2016-06-24 | region: Add writeat and eraseat support | Antonello Dettori |
| 2016-06-21 | riscv-spike: Move coreboot to 0x80000000 (2GiB) | Jonathan Neuschäfer |
| 2016-06-12 | arch/riscv: Compile with -mcmodel=medany | Jonathan Neuschäfer |
| 2016-06-12 | arch/riscv: Add misc.c to bootblock/romstage to get udelay() | Jonathan Neuschäfer |
| 2016-06-12 | arch/riscv: copy read/write8/16/32 from x86 | Jonathan Neuschäfer |
| 2016-06-12 | arch/riscv/trap_util.S: Use "li" pseudo-instruction to load a constant | Jonathan Neuschäfer |
| 2016-05-03 | build system: remove CBFSTOOL_PRE1_OPTS | Patrick Georgi |
| 2016-05-02 | lib/coreboot_table: use the architecture dependent table size | Aaron Durbin |
| 2016-05-02 | arch: introduce architecture dependent common variables | Aaron Durbin |
| 2016-04-21 | lib: add common write_tables() implementation | Aaron Durbin |
| 2016-04-21 | lib/coreboot_table: add architecture hooks for adding tables | Aaron Durbin |
| 2016-04-21 | lib/bootmem: allow architecture specific bootmem ranges | Aaron Durbin |
| 2016-04-21 | arch: only print cbmem entries in one place | Aaron Durbin |
| 2016-04-21 | arch: use Kconfig variable for coreboot table size | Aaron Durbin |
| 2016-04-21 | arch/riscv/tables: remove confusion over write_tables() | Aaron Durbin |
| 2016-04-08 | Change la to li (load immediate) | Ronald G. Minnich |
| 2016-03-09 | Makefile: Add build-time overlap check for programs loaded after coreboot | Julius Werner |
| 2016-02-22 | die() when attempting to use bounce buffer on non-i386. | Vladimir Serbinenko |
| 2016-02-19 | lib/coreboot_table: add function to allow arch code to add records | Aaron Durbin |
| 2016-02-19 | RISC-V: Add more debug info to debug printks | Andrew Waterman |
| 2016-02-19 | RISC-V: Make inline asm usage safer | Andrew Waterman |
| 2016-02-11 | arches: lib: add main_decl.h for main() declaration | Aaron Durbin |
| 2016-02-11 | arch/{arm64,riscv}: remove jmp_to_elf_entry() declaration | Aaron Durbin |
| 2016-02-11 | arch: remove stage_exit() | Aaron Durbin |
| 2016-01-28 | Makefile: Make full use of src-to-obj macro | Nico Huber |
| 2016-01-21 | console: Simplify bootblock console Kconfig selection logic | Alexandru Gagniuc |
| 2016-01-18 | arch/riscv: Add missing license headers | Martin Roth |
| 2015-12-10 | lib: remove assets infrastructure | Aaron Durbin |
| 2015-12-02 | build system: Add more files through cbfs-files instead of manual rules | Patrick Georgi |
| 2015-11-11 | arm/arm64: Generalize bootblock C entry point | Julius Werner |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-09-23 | RISCV: modify arch_prog_run to handle payloads correctly. | Ronald G. Minnich |
| 2015-09-16 | riscv-virtual-memory: move page tables into virtual address space | Thaminda Edirisooriya |
| 2015-09-16 | riscv-memlayout: fix existing memlayout issues, add sbi interface | Thaminda Edirisooriya |
| 2015-09-15 | riscv-trap-handling: Add functionality, prevent stack corruption | Thaminda Edirisooriya |
| 2015-09-10 | riscv-trap-handling: Add implementation for trap calls in riscv | Thaminda Edirisooriya |
| 2015-09-10 | riscv-virtual-memory: Add virtual memory setup | Thaminda Edirisooriya |
| 2015-09-09 | linking: add and use LDFLAGS_common | Aaron Durbin |
| 2015-08-26 | riscv-trap-handling: Add preliminary trap handling for riscv | Thaminda Edirisooriya |
| 2015-08-09 | riscv-spike: support for Spike emulation of riscv | Thaminda Edirisooriya |
| 2015-07-22 | riscv: Link in libgcc | Patrick Georgi |
