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2008-10-01The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots ofCarl-Daniel Hailfinger
code to use it. That makes the code more readable and also less error-prone. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-27fix ppc mainboards (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18rename linuxbios_* files, too.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Please bear with me - another rename checkin. This qualifies as trivial, noStefan Reinauer
code is changed. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-05Use the common LinuxBIOS license header (trivial). Refs #5.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2520 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-07-19move mptable to 960k to 1MStefan Reinauer
https://openbios.org/roundup/linuxbios/issue55 This patch is a little bit enhanced, it keeps the ppc table consistent, which Yinghai's original patch did not. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-14comment and unify lb_uint64 handling as discussed on the mailinglistStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-03reverting rev 2082Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-11-02ppc970 initial porting.Eswar Nallusamy
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-20changes to support new ppc archGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-19trying to compile...Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2062 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-19get include files rightGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-10-05Updating FSF address in the code.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-15shame on me.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-15obviously brokenStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1820 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-12-10- Fix the definition of the linuxbios table so all of the compilersEric Biederman
will generate the struct lb_memory_range the same. - Add a few pci_ids. - Small readabiltiy clean ups to debug_dev git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-18- First stab at getting the ppc ports building and working.Eric Biederman
- The sandpointx3+altimus has been consolidated into one directory for now. - Added support for having different versions of the pci access functions on a per bus basis if needed. Hopefully I have not broken something inadvertently. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-12ooops. sorryStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-11fix a little more of ppcStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-11mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a ↵Eric Biederman
complex expression. crt0.S.lb: Modified so that it is safe to include console.inc console.c: Added print_debug_ and frieds which are non inline variants of the normal console functions div64.h: Only include limits.h if ULONG_MAX is not defined and define ULONG_MAX on ppc socket_754/Config.lb Conditionally set config chip.h socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references. slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops slot_2/slot2.c: The same spelling fix socket_mPGA603/chip.h: again socket_mPGA603/socket_mPGA603_400Mhz.c: and again socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME socket_mPGA604_800Mhz/chip.h: Another spelling fix socket_mPGA604_800Mhz.c and again via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates earlymtrr.c: Remove work around for older versions of romcc pci_ids.h: More ids. malloc.c: We don't need string.h any longer uart8250.c: Be consistent when delcaring functions static inline arima/hdama/mptable.c: Cleanup to be a little more consistent amdk8/coherent_ht.c: - Talk about nodes not cpus (In preparation for dual cores) - Remove clear_temp_row (as it is no longer needed) - Demoted the failure messages to spew. - Modified to gracefully handle failure (It should work now if cpus are removed) - Handle the non-SMP case in verify_mp_capabilities - Add clear_dead_routes which replaces clear_temp_row and does more - Reorganize setup_coherent_ht_domain to cleanly handle failure. - incoherent_ht.c: Clean up the indenation a little. i8259.c: remove blank lines at the start of the file. keyboard.c: Make pc_keyboard_init static ramtest.c: Add a print out limiter, and cleanup the printout a little. amd8111/Config.lb: Mention amd8111_smbus.c amd8111_usb.c: Call the structure usb_ops not smbus_ops. NSC/pc97307/chip.h: Fix spelling issue pc97307/superio.c: Use &ops no &pnp_ops. w83627hf/suerio.c: ditto w83627thf/suerio.c: ditto buildrom.c: Use braces around the body of a for loop. It's more maintainable. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- First pass at getting the powerpc ports to compileEric Biederman
The static device tree is not built properly at all yet, but at least we get through it. FIXME (What is the proper way to handle add in boards?) - Add generic div64 support and ppc div64 support - Fix abuild so it properly generates the CC line when cross compiling. - Add one more possible ppc cross compiler target git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-30- To reduce confuse rename the parts of linuxbios bios that run fromEric Biederman
ram linuxbios_ram instead of linuxbios_c and linuxbios_payload... - Reordered the linker sections so the LinuxBIOS fallback image can take more the 64KiB on x86 - ROM_IMAGE_SIZE now will work when it is specified as larger than 64KiB. - Tweaked the reset16.inc and reset16.lds to move the sanity check to see if everything will work. - Start using romcc's built in preprocessor (This will simplify header compiler checks) - Add helper functions for examining all of the resources - Remove debug strings from chip.h - Add llshell to src/arch/i386/llshell (Sometime later I can try it...) - Add the ability to catch exceptions on x86 - Add gdb_stub support to x86 - Removed old cpu options - Added an option so we can detect movnti support - Remove some duplicate definitions from pci_ids.h - Remove the 64bit resource code in amdk8/northbridge.c in preparation for making it generic - Minor romcc bug fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-27sizeram removal/conversion.Eric Biederman
- mem.h and sizeram.h and all includes killed because the are no longer needed. - linuxbios_table.c updated to directly look at the device tree for occupied memory areas. - first very incomplete stab a converting the ppc code to work with the dynamic device tree - Ignore resources before we have read them from devices, (if the device is disabled ignore it's resources). - First stab at Pentium-M support - add part/init_timer.h making init_timer conditional until there is a better way of handling it. - Converted all of the x86 sizeram to northbridge set_resources functions. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14- First pass through with with device tree enhancement merge. Most of the ↵Eric Biederman
mechanisms should be in place but don't expect anything to quite work yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-05Add extra phase before memory init.Greg Watson
Rename sdram_init to memory_init NOTE: need to test sandpoint and ep boards! git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03Make names more sensible.Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-26move arch/<arch>/config to arch/<arch>/initStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-21added cache initialization codeGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1522 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-13byte swappingGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-13removed unused codeGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-13byteorder routinesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11- Moved hlt() to it's own header.Eric Biederman
- Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-07fix caching problemGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1382 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-22updated for other boardsGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-22get memory mapped i/o workingGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-17needed for 4xx startupGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1314 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-12-17added _outsw_nsGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-15*** empty log message ***Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-15need this codeGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-15jumping to payloadGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-15make sure stack resides in cacheGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09*** empty log message ***Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09fixed warningGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1269 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09ticks_since_boot needed for sandpointGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09printk for initGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1267 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09used in init codeGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1266 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09not needed when using initGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1265 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-09split for initobjectGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-05*** empty log message ***Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-03add board_initGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-02copied for i386Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-02*** empty log message ***Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-02cant be extern unless defined in a library somewhereGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-02moved to clock.hGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-02new headersGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-02fix timer routinesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12cache ram startupGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1208 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12pre-mem startupGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1207 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12get pci ops rightGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-12missing directiveGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1201 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05no hardcoded addresses!Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05standard functionsGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1195 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05no need for assemblyGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1194 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-05new cpu typesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1193 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02- Major update of the dynamic device tree so it can handleEric Biederman
* subtractive resources * merging with the static device tree * more device types than just pci - The piece to watch out for is the new enable_resources method that was needed in all of the drivers git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28PPC 4XX supportGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28use longsGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28PVR supportGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28added new routinesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28deal with different reset vector addressesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28made timer more genericGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28added ppc_ to function namesGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17- Remove $Id: from crt0.S.lbEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@969 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14new init formatGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14new init stuffGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-13*** empty log message ***Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12- Remove all of the annoying $Id stringsEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13More FB2 stuffGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13Added tables.cGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13Fixes.Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13PPC cpu stuffGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-09Moved from freebiosGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-11 08:26:07 +0000