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Change-Id: Ia47ddd864e770162a9a6760e975f0b7dc9aac654
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84869
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
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Change-Id: Ib3997e8a4fccefeaa316a07c319323e5e979e5fd
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84690
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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Change-Id: I14c05298a56ff1ac1575bb59caa4e55b44f3aba0
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84670
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
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Change-Id: I93912fa3a3e247fe5da2b2ac3ffa02a9d3dbb02a
Signed-off-by: Jayvik Desai <jayvik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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Change-Id: I389934afcc533702078fc5533736f5e4a98cd553
Signed-off-by: Julia Kittlinger <julia.kittlinger@pm.me>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84444
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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I also add myself as the Maintainer for the SiFive boards, since I
happen to have both of them and I also ported the HiFive Unmatched to
coreboot.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Ic0b8e1053c9f5007e29e997c1ff21ff4a496aea8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83697
Reviewed-by: ron minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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Add INTEL PANTHERLAKE SOC section for soc/intel/pantherlake and
add Subrata, Kapil and Pranava as maintainers.
Change-Id: Ife75a0d8111e694ae62db157eb36b09d976762c3
Signed-off-by: Pranava Y N <pranavayn@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83780
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add GOOGLE FATCAT MAINBOARDS section for src/mb/google/fatcat and
update the maintainers list to add Subrata Banik and Pranava Y N
as maintainers
Change-Id: I5ae0f0d24d43e91c2097c68446bb64b9ae507e2e
Signed-off-by: Pranava Y N <pranavayn@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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Change-Id: Ibb000fa5e35633504fdd346723efb0c367cbd075
Signed-off-by: Jayvik Desai <jayvik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83726
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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Change-Id: Idcdd3e2525b621310aaf43608fd5fede8133d16a
Signed-off-by: Rishika Raj <rishikaraj@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83675
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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I am the one who takes care of end to end DPTF (Thermal Management)
related coreboot things across various X86 based platforms.
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Change-Id: I08a1ae48bd5b66ee2f7903615e64d0bab5e0d7d0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
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All of the Dell Latitudes from GM45 and until at least Haswell use a
derivative of the MEC5035 EC, and I have been actively working on
coreboot support for this EC and boards that use it. Rename the "E6400
MAINBOARD" section to "DELL LATITUDE" and add mb/dell/snb_ivb_latitude
and mb/dell/e7240 as additional paths.
Change-Id: I7ba46980bfc8569a85593e415f01cc83fe7d67d7
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83008
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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That's an ATX mainboard with a LGA1150 socket and four DDR3 DIMM slots.
Porting was done using autoport and then doing a bunch of manual edits.
This board has two socketed DIP-8 SPI flash chips and a physical switch
to choose which one should the system boot from. As long as one of them
contains a bootable firmware image, it is possible to reflash the other
chip using the internal programmer by flipping the switch after booting
to OS. Even if one somehow manages to flash unbootable firmware to both
chips, they are socketed: one can carefully remove them from the socket
and reflash them externally, which is a relatively safe procedure (when
compared to in-circuit flashing, especially if the board isn't designed
to safely be flashed in-circuit). In short, the board is hard to brick.
Haswell MRC.bin cannot be used because it lacks support for the Z97 PCH
found on this mainboard. Broadwell MRC.bin only works with Haswell CPUs
so far, as raminit fails on Broadwell CPUs for an unknown reason. Maybe
it's something about RcvEn, but it's unlikely it can easily be fixed.
Working:
- All four DIMM slots
- Broadwell MRC.bin for raminit purposes
- Serial port to emit spam
- POST code display
- S3 suspend/resume
- All rear USB 3.0 ports
- Internal USB 2.0 port
- Audio output (green jack)
- Integrated graphics (libgfxinit)
- HDMI
- VBT
- Intel GbE (I218-V PHY and PCH MAC)
- Realtek RTL8111E GbE
- At least one SATA port
- M2_1 slot (Gen3 x4, bifurcated from CPU)
- Flashing internally with flashrom
- SeaBIOS (current version) to boot Arch Linux
- NCT6791D Super I/O software-based fan control
tested using `sensors` and `pwmconfig`, all 6
fan tachometers and 5 PWM outputs work fine.
Untested for now (i.e. should work, will eventually test):
- DVI-I, DisplayPort
- EHCI debug
- Front USB 2.0 and 3.0 ports
- The other audio jacks (as well as SPDIF)
- The other PCIe and M.2 ports
- Non-Linux OSes
- PS/2 combo port (can only test with a keyboard)
Untestable (i.e. cannot test due to unavailable hardware):
- Thunderbolt AIC (Add-In Card) support
Not working:
- Broadwell CPUs, they require more magic to work (working on it).
- Booting from ASM1062 SATA ports with SeaBIOS. Other payloads were
not tested. It seems that the problem is with the controllers.
- Super I/O automatic fan control: not yet implemented in coreboot.
To control fans, use software fan control methods in the meantime.
- Acer B247Y board driving a FHD panel of a Samsung S24E650 monitor,
connected to the board's HDMI output says "Unsupported resolution"
after libgfxinit configured the iGPU outputs in linear framebuffer
mode. HDMI output works fine after Linux's i915 driver takes over.
Not sure if it's specific to the monitor: the HDMI cable is beaten
up, and it is hard to replace (need to relocate the logic board so
that the ports are accessible).
Change-Id: If1d22547725e59f435de36b973e1bf4f334269a9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Máté Kukri <kukri.mate@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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It makes little sense to keep these around. Boards maintained on a
branch should use that branch's MAINTAINERS file instead, I'd say.
Change-Id: I670df889ffce82ee4ee4e2b91fe70f18adfcfdfa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82220
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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I am the one who takes care of most coreboot things for this board.
Change-Id: I1f587822d60d2f69f34f272685cad50149faf79b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82222
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Both boards are most certainly `Supported`, and have been for a long
time. I have no idea why they were labelled as `Maintained` instead.
Change-Id: I02a5979f094b507e9f7d758daf47eeb95064cf0d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82221
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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`Sacalable` ---> `Scalable`
Change-Id: Iea6d3558269c41e87e2be936a82c22a2da666b47
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82219
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I5170a69d798d0e8198b89f6932a80e6051228ac2
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82082
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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When soc/amd/genoa was renamed to soc/amd/genoa_poc and mb/amd/onyx
was renamed to mb/amd/onyx_poc, the MAINTAINERS file wasn't updated, so
no reviewers were added automatically to patches on Gerrit that change
things in soc/amd/genoa_poc or mb/amd/onyx_poc. Fix this by updating the
folder names in the MAINTAINERS file too.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib52781ebc98bd2ce9df495526cfaf9d884aace50
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81679
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Place METEORLAKE SoC in alphabetical order.
Change-Id: Ic04163e746ee3e450e58563abbf994e6aa44e69d
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81677
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
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Change-Id: Icbf04f347a02670d0bf38e0328fa6b523d6851b5
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Change-Id: Ic924b8faf44473fa4bac5c033a8e784e41581292
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80863
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
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Change-Id: I6ad9dbe3bd073f3c43878beec201491b87694fc3
Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
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Change-Id: I20ad4bc325d5cfe7a9d5f8b349eeea3d6218452b
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80241
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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Change-Id: Ide3aa87fca69be6b0f1ffe0b18d7ffb410e5c563
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80240
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: Id8e3637d88d195c6a7d4afd5e6266da718215767
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79989
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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jacz@semihalf.com is no longer available, czapiga@google.com should be
used instead.
Change-Id: I228b34c961ccf1546103f105276a75409825a432
Signed-off-by: Jakub Czapiga <czapiga@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79438
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I92d5497644338927b81fbabea2bce45f1e59f0b4
Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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Change-Id: Ia368f390901424ef427eaefaa57acf2b6ae5d703
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78989
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
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Change-Id: I0eaf94f7fb91a4b11dab2731a0b5d08aa85fd41e
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78988
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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1. Split AMD mainboard between AMD server and AMD non-server SoC
2. Add maintainers for onyx mainboard
Change-Id: I94814da1c06d57cc63c9b968866570a812346fde
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78987
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I4c025bbcb205fa5bd3dcb35c685a3db289a3f824
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78803
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I67bf98ee7661b031be6d1d77a4db8d816c4a6a0b
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78272
Reviewed-by: Ravishankar Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Gaggery Tsai <gaggery.tsai@intel.com>
Reviewed-by: Kane Chen <kane.chen@intel.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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Add myself :p
Change-Id: Ib2bd5d9e9c93cf09ce4bca6a55cb5fab137f1bbc
Signed-off-by: Eric Lai <ericllai@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78219
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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I didn't have enough time, so it's reasonable to remove myself.
Change-Id: I8f7d87f70916f3d0697b6c38ca6d75f3375bd374
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77965
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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The AMD team is large enough to handle it on their own :)
Change-Id: I58bc265d9ecfdcb8904f32fbc917877211b7f658
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
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Change-Id: Idd3acd204c0809753b6f5534790e1dc81c10b761
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71859
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I8308ac1d2f3c9a34b55c788797bccd4e7fcefd5c
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77348
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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Change-Id: I05c84cae5a050cc69f4d9eecaa0f82caacc85c2d
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77345
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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I don't get around to do proper full reviews of SIO patches since maybe
3 years, so I better remove myself from the maintainers list for that
part of the coreboot tree. If anyone else wants to take this over,
please go ahead. I can still help with some advice and general ideas in
that area, but even the "odd fixes" status that I downgraded the
maintenance status of that sub-tree to some time ago was a bit too
optimistic.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic56b710ffe68c6e407786d551cafac698e8bb61d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77063
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Eran Mitrani <mitrani@google.com>
Change-Id: I7f01ee979036071ce7574254101e25b908f8e788
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76884
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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CPU:
- 2 SPR sockets
- 64 total PCIe 5.0 lanes with up to 64 lanes of Flex Bus/CXL per CPU
- Up to 32 DDR5 DIMM
- 1 Gbase-T NIC port
- 1 USB3.0 type A, 1 USB2.0 connector
- 1 VGA connector
BMC:
- ASPEED AST2600 BMC
- 1 DDR4 8Gb memory
- 1 8GB eMMC
Test:
The board boots to Linux 4.19.6 with all 192 cores available.
Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684
Signed-off-by: Annie Chen <Chen.AnnieET@inventec.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75598
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Wei Chen <Chen.HW@inventec.com>
Reviewed-by: Annie Chen <chen.annieet@inventec.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Cannon Lake, which covers Coffee Lake and Comet Lake, has been missing
from the maintainers file. Most unmerged patches for it have recently
been abandoned after 2+ years of inactivity.
Change-Id: Ic381f8efc4a423dca83c36605002aeeabf4bfdd9
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76416
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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Change-Id: If1fe1c4db1b825dac44aec01902f44c05582e69b
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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Change-Id: Ic2efbb1d2a13212921ad110314a6394a4dca6a8a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
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Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I914a7f665e246e7490c127078a5a9795c8334d92
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
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- Add Google MediaTek mainboards
- Update maintainers for MediaTek SoCs and mainboards
Change-Id: Ic3e99b08fe9eb153263470bc6c7a97524e1bf888
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74304
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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Change-Id: I6f2047e62c1e999823bf98acaf3530aa62478449
Signed-off-by: Kevin Keijzer <kevin@quietlife.nl>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Fabian Groffen <grobian@gentoo.org>
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This includes mb/dell/e6400 and ec/dell/mec5035, the latter being
the EC on the E6400. Also link to my repo containing research
and documentation I wrote for the MEC5035.
Change-Id: I5b521e6b1fce5b076be6f0392d99aafac35b0084
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Now that the next generation of APUs is officially announced, we can
unmask morgana.
The chip formerly known as Morgana is actually Phoenix.
Surprise!
This patch just changes the name across the entire codebase.
Note that the fw.cfg file will stay pointing to the
3rdparty/amd_blobs/morgana/psp directory until the amd_blobs_repo is
updated.
Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: Ie9492a30ae9ff9cd7e15e0f2d239c32190ad4956
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71731
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add the following people as maintainers for the cross toolchain.
* Martin Roth
* Felix Singer
* Elyes Haouas
Change-Id: I3fad10baa0f0177693e009a4bbc218c6064611b9
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70923
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
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Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I85d4d4fe11f0b579c2327f3d1dfce90229ca9dc9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70217
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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- X86 architecture is maintained, so mark it as such.
- Legacy AMD chips are supported for odd fixes.
- Remove maintainers whose emails are bouncing.
- Remove maintainers who don't have +2 rights in gerrit.
- According to the instructions, we should use S: Orphan, not Orphaned.
- Update incorrect email addresses.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ib6d47a8c34482c81ff96dbeec760852cba01dabc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68709
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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- Presumably all of the ec/google subdirectory is maintained
- Add list of Orphan ECs
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ia93e8da9898903ae92873a07fb0af2a2aa76e8b4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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- AMD reference boards are maintained at least for odd fixes.
- Google panther has become a variant of Beltino, so remove it.
- Remove people whose email addresses are bouncing email.
- Remove people who responded to my email about being a maintainer and
asked to be removed.
- Alphabetize list
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic6ecaae77df2f2edaf724160bce04c038cbd115e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68707
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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The mainboards are broken out into individual entries in hopes that it
will be easier for someone to claim ownership than if they were lumped
into a single "Orphaned Mainboards" group.
The theory behind this is that a single mainboard is really the easiest
piece of coreboot to maintain. Hopefully some less-experienced people
will be interested in stepping up to take over ownership of a mainboard.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I9542b3a7cd87fa8656bc0982c08061e9d0513745
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I0e06ac5f92109757143897f3d331aeea0cefe4b9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
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Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I6f5c10618edb87d2dc12c14187c4620d8675a443
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68704
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Andrey doesn't seem to have interacted with APL or coreboot
2+ years, so remove him and mark Apollo Lake as orphaned.
Add myself for Odd Fixes.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I6cb2f2da63dda3cb841786d53f89b583a9df9791
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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To help make sure that future releases are done correctly and on time,
we are setting up a team with the shared responsibility for doing the
releases and maintaining the release notes, scripts, and documentation.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I5ef5b10fce9b16241de548df225fd12c9a7e199f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68460
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
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Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: Iae811c97aba15dd6c9c740aedd7c802e14f53788
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68439
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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This AMD reference board is called Pademelon and not Padmelon, so fix
the name in coreboot. Also update the corresponding documentation.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id1c7331f5f3c34dc7ec4bc5a1f5fe3d12d503474
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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Signed-off-by: Tarun Tuli <taruntuli@google.com>
Change-Id: I973b0abf8a82189df1495e3bcd9bae452a5be827
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
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I will no longer be working on coreboot professionally anymore, so
update the MAINTAINERS file to reflect that; I leave myself as an ACPI
maintainer as I would still like to keep working with the coreboot
community :-).
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Iaf3f93ad876071cd6c24705dd61a9c98e397fba0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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- Add legacy AMD reference boards
- Add Google AMD mainboards
- Add mailing list for code changes to all AMD sections
- Update people in AMD groups
Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Change-Id: Ibd8001f8e4cd667bf9223dc32bc33a5a1dc9e89f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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'Mendocino' was an embargoed name and could previously not be used
in references to Skyrim. coreboot has references to sabrina both
in directory structure and in files. This will make life difficult
for people looking for Mendocino support in the long term. The code
name should be replaced with "mendocino".
BUG=b:239072117
TEST=Builds
Cq-Depend: chromium:3764023
Cq-Depend: chromium:3763392
Cq-Depend: chrome-internal:4876777
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I2d0f76fde07a209a79f7e1596cc8064e53f06ada
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65861
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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Change-Id: Ia5def4cf86b47ac96ba5fc6ec86a139d5ad2765e
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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Change-Id: Ie5c2d01e13cafdbfd629ebe52af8b1f0cc8f20be
Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66378
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Id7fe11269276f0752545a51d92395cfc03445471
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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Change-Id: I16b3a3b01b54c7bb779f13a76bbd45bee1c864f7
Signed-off-by: Matt DeVillier (AMD) <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66029
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I165dc152af305b8df2d5e0c9396e11087004b3c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: I5a8681a207149c11402aa51df1878746560c5b6f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Change-Id: I203f122de6641359306c2659cb9d9dc2c93d184c
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
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I don't really get around to review super I/O or superiotool patches any
more, so lower the maintenance level of those. If anyone else wants to
step up as new maintainer for those two, feel free to do so.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id7bd3c68c1adc0db82dab078291918742b453d4c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63417
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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Change-Id: Ie75912698e58088ff4a334403cb331542abb40fd
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62754
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Split entry, remove Michal Motyl and add Jeff Daly.
Change-Id: Ie572d95c9dd85f59bc3fe47bb61bc6b6866fe4c3
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Suresh Bellampalli <suresh.bellampalli@intel.com>
Reviewed-by: Jeff Daly <jeffd@silicom-usa.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I441369bc47ad4758c2188cb4e0f7e971607f72d5
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62137
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie39e42407fe4677d4c8e991824588d2d598a73ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8630b8ac472af94bbeede2bcadf4d0a750b44e5c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
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Change-Id: I09aca01d9bb2624983e0d62628aef617c10eba9c
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60138
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Change-Id: I3a6ecff4cf0c22e941261b77deefb272c1137a8e
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: Ic9dabd0386a32dd1ec0b99e0df3f41f34effc7a3
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Tested using MrChromeBox's `uefipayload_202107` branch:
* Windows 10
* Ubuntu 20.04
* MX Linux 19.4
* Manjaro 21
No known issues.
https://starlabs.systems/pages/starbook-specification
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I090971a9e8d2be5b08be886d00d304607304b645
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56088
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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I also have this board in addition to G505S and AM1I-A.
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I0fe3ee6524209980a463b7835128b5c40f5d4ca5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58659
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: Ifd4837e11a0ac22e1c8855553a0c51b0f25ab96c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: If39607eeb9e6309ff1b8b0eb3158f1a1ffc2e231
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57716
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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Change-Id: Ibfa877fc328d64be4de372fb7f4401717158ed9e
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52743
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Add NixOS configurations for bootable live systems containing a set of
tools which might be useful for firmware development in general and for
working on coreboot.
There are two configurations provided. One for console-only and a
graphical one, which is mostly the same as the console image but it
comes with Gnome Shell as window manager and some graphical tools in
addition.
An image can be built using `build-console.sh`, respectively
`build-graphical.sh`. The resulting iso image can be found in
`result/iso/`.
The console image results in ~700MB, while the graphical one results in
~2GB.
Change-Id: Iaf49d198e99781434bd89d2a8a125a4988b77e1c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Idc4d98fd35d1b2f2d8165909c0fce141c6ca100d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56855
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The Cezanne FSP headers are located in that directory, so add it to the
Cezanne SoC folders in the maintainers file.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4f4894f0b01fa916492f57a730c62f29c5f7c796
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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Change-Id: I85835712926ca456b108b1d80e6a55f75e604591
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I8aa9ee1627bf319660b193b4602d8c2d0b562424
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52580
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I302e408fa9479e7fc03f344f092e145dd2b86ba5
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52581
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add current maintainers for vboot-related code, and combine the vboot
and vboot2 sections which are not really separate anymore. What's left
in vendorcode/google/chromeos isn't really related to vboot anymore
since the vboot code was moved under src/security, so take it out of
there.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I59a2df9c1580291a6d29537868aab0e1b339a2ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56728
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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Aaron is no longer employed at Google and is not actively working on
coreboot anymore, therefore remove this account from MAINTAINERS.
Change-Id: Ife7c75ab8290873da1e02332609482c407373c45
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56697
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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This reverts commit 2e665eb8daa2963c52092e694a5316dc544a23f5.
Reason for revert: Was submitted too early and out-of-order.
Change-Id: I119b7a81b849bbe3424d73d5fdf9b55481444686
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54971
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml)
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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To preserve reproducibility, temporarily guard mainboard.c contents.
Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus P8Z77-M PRO
remains identical when not adding the .config file in it.
Change-Id: I05e272690ca78f6b9e22b1db1c36cb9e5a7afe3c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Get ready to squash all Asus Z77 boards together, so as to factor out
some redundant code.
Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus P8Z77-V LX2
remains identical when not adding the .config file in it.
Change-Id: I701ec4adbc65732ffc0a60d311bf07bf7f414ebf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Handle some differences in the DSDT code using preprocessor.
Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus P8H61-M LX
remains identical when not adding the .config file in it.
Change-Id: I2a02f32dfd9fa9c1adce3baf0d279ea19db5883f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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