diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/apollolake/acpi/gpio.asl | 13 | ||||
-rw-r--r-- | src/soc/intel/apollolake/include/soc/pm.h | 6 |
2 files changed, 13 insertions, 6 deletions
diff --git a/src/soc/intel/apollolake/acpi/gpio.asl b/src/soc/intel/apollolake/acpi/gpio.asl index 5660dfa830..4f3bc3ee2c 100644 --- a/src/soc/intel/apollolake/acpi/gpio.asl +++ b/src/soc/intel/apollolake/acpi/gpio.asl @@ -174,6 +174,19 @@ scope (\_SB) { \_SB.SPC0 (Local2, Local1) } } + + /* + * Sleep button device ASL code. We are using this device to + * add the _PRW method for a dummy wake event to kernel so that + * before going to sleep kernel does not clear bit 15 in ACPI + * gpe0a enable register which is actually the GPIO_TIER1_SCI_EN bit. + */ + Device (SLP) + { + Name (_HID, EisaId ("PNP0C0E")) + + Name (_PRW, Package() { GPE0A_GPIO_TIER1_SCI_STS, 0x3 }) + } } Scope(\_GPE) diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 3ee7403b9b..2c12c8d28e 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -138,12 +138,6 @@ #define PCIE_GPE_EN (1 << 9) #define SWGPE_EN (1 << 2) -/* - * Enables the setting of the GPIO_TIER1_SCI_STS bit to generate a wake event - * and/or an SCI or SMI#. - */ -#define GPIO_TIER_1_SCI (1 << 15) - /* Memory mapped IO registers behind PMC_BASE_ADDRESS */ #define PRSTS 0x1000 #define GEN_PMCON1 0x1020 |