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-rw-r--r--src/mainboard/google/deltaur/variants/baseboard/devicetree.cb2
-rw-r--r--src/mainboard/google/volteer/variants/baseboard/devicetree.cb1
-rw-r--r--src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb1
-rw-r--r--src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb1
-rw-r--r--src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb2
-rw-r--r--src/mainboard/system76/darp7/devicetree.cb4
-rw-r--r--src/mainboard/system76/galp5/devicetree.cb4
-rw-r--r--src/mainboard/system76/gaze16/devicetree.cb4
-rw-r--r--src/mainboard/system76/lemp10/devicetree.cb4
-rw-r--r--src/mainboard/system76/oryp8/devicetree.cb1
-rw-r--r--src/soc/intel/tigerlake/chip.h3
-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params.c2
12 files changed, 7 insertions, 22 deletions
diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
index 72ed789aec..9ed8fb299e 100644
--- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb
@@ -291,7 +291,7 @@ chip soc/intel/tigerlake
device pci 1f.1 off end # P2SB
device pci 1f.2 hidden end # PMC
device pci 1f.3 on end # Intel HDA
- device pci 1f.4 on end # SMBus
+ device pci 1f.4 off end # SMBus
device pci 1f.5 on end # PCH SPI Flash Controller
device pci 1f.6 off end # GbE Controller
device pci 1f.7 off end # Intel Trace Hub
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
index b4c4f6a41f..eee29ef2ce 100644
--- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb
@@ -92,7 +92,6 @@ chip soc/intel/tigerlake
# FSP configuration
register "SaGv" = "SaGv_Enabled"
- register "SmbusEnable" = "0"
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index b84fddc397..0e34eb2663 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -13,7 +13,6 @@ chip soc/intel/tigerlake
# FSP configuration
register "SaGv" = "SaGv_Enabled"
- register "SmbusEnable" = "1"
# CNVi BT enable/disable
register "CnviBtCore" = "true"
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index fcadcee990..17af01aaeb 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -13,7 +13,6 @@ chip soc/intel/tigerlake
# FSP configuration
register "SaGv" = "SaGv_Disabled"
- register "SmbusEnable" = "1"
# CNVi BT enable/disable
register "CnviBtCore" = "true"
diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
index 5c55dce396..c8abce9be7 100644
--- a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
@@ -232,7 +232,7 @@ chip soc/intel/tigerlake
subsystemid 0x10ec 0x1200
register "PchHdaAudioLinkHdaEnable" = "1"
end
- device pci 1f.4 on end # SMBus
+ device pci 1f.4 off end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE
device pci 1f.7 off end # TH
diff --git a/src/mainboard/system76/darp7/devicetree.cb b/src/mainboard/system76/darp7/devicetree.cb
index 8c16d2addb..7a3e072236 100644
--- a/src/mainboard/system76/darp7/devicetree.cb
+++ b/src/mainboard/system76/darp7/devicetree.cb
@@ -329,9 +329,7 @@ chip soc/intel/tigerlake
device ref hda on
register "PchHdaAudioLinkHdaEnable" = "1"
end
- device ref smbus on
- register "SmbusEnable" = "1"
- end
+ device ref smbus on end
device ref fast_spi on end
end
end
diff --git a/src/mainboard/system76/galp5/devicetree.cb b/src/mainboard/system76/galp5/devicetree.cb
index b0fa5243fb..aabeedbf6b 100644
--- a/src/mainboard/system76/galp5/devicetree.cb
+++ b/src/mainboard/system76/galp5/devicetree.cb
@@ -333,9 +333,7 @@ chip soc/intel/tigerlake
device ref hda on
register "PchHdaAudioLinkHdaEnable" = "1"
end
- device ref smbus on
- register "SmbusEnable" = "1"
- end
+ device ref smbus on end
device ref fast_spi on end
end
end
diff --git a/src/mainboard/system76/gaze16/devicetree.cb b/src/mainboard/system76/gaze16/devicetree.cb
index 380bdc0c0f..f5f216cc4b 100644
--- a/src/mainboard/system76/gaze16/devicetree.cb
+++ b/src/mainboard/system76/gaze16/devicetree.cb
@@ -145,9 +145,7 @@ chip soc/intel/tigerlake
device ref hda on
register "PchHdaAudioLinkHdaEnable" = "1"
end
- device ref smbus on
- register "SmbusEnable" = "1"
- end
+ device ref smbus on end
device ref fast_spi on end
end
end
diff --git a/src/mainboard/system76/lemp10/devicetree.cb b/src/mainboard/system76/lemp10/devicetree.cb
index 5c702b9fe1..2c03e60d81 100644
--- a/src/mainboard/system76/lemp10/devicetree.cb
+++ b/src/mainboard/system76/lemp10/devicetree.cb
@@ -294,9 +294,7 @@ chip soc/intel/tigerlake
device ref hda on
register "PchHdaAudioLinkHdaEnable" = "1"
end
- device ref smbus on
- register "SmbusEnable" = "1"
- end
+ device ref smbus on end
device ref fast_spi on end
end
end
diff --git a/src/mainboard/system76/oryp8/devicetree.cb b/src/mainboard/system76/oryp8/devicetree.cb
index 429ad621c4..4263806b34 100644
--- a/src/mainboard/system76/oryp8/devicetree.cb
+++ b/src/mainboard/system76/oryp8/devicetree.cb
@@ -212,7 +212,6 @@ chip soc/intel/tigerlake
register "PchHdaAudioLinkHdaEnable" = "1"
end
device ref smbus on
- register "SmbusEnable" = "1"
chip drivers/i2c/tas5825m
register "id" = "0"
device i2c 4e on end # (8bit address: 0x9c)
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index f0858db1b8..e729e8c0ee 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -272,9 +272,6 @@ struct soc_intel_tigerlake_config {
/* PCIE RP Advanced Error Report: Enable (1) / Disable (0) */
uint8_t PcieRpAdvancedErrorReporting[CONFIG_MAX_ROOT_PORTS];
- /* SMBus */
- uint8_t SmbusEnable;
-
/* Gfx related */
uint8_t SkipExtGfxScan;
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index 40683e2a2e..24b8575357 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
@@ -130,7 +130,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* Channel Hash Mask:0x0001=BIT6 set(Minimal), 0x3FFF=BIT[19:6] set(Maximum) */
m_cfg->ChHashMask = 0x30CC;
/* Enable SMBus controller based on config */
- m_cfg->SmbusEnable = config->SmbusEnable;
+ m_cfg->SmbusEnable = is_devfn_enabled(PCH_DEVFN_SMBUS);
/* Set debug probe type */
m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT;