diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/haswell/haswell_mrc/raminit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_shared.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/raminit.c | 3 |
3 files changed, 4 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/haswell_mrc/raminit.c b/src/northbridge/intel/haswell/haswell_mrc/raminit.c index f23e40d8f7..7109e46da0 100644 --- a/src/northbridge/intel/haswell/haswell_mrc/raminit.c +++ b/src/northbridge/intel/haswell/haswell_mrc/raminit.c @@ -73,7 +73,7 @@ static void report_memory_config(void) const u32 addr_decoder_common = mchbar_read32(MAD_CHNL); printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", - (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); + DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100)); printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", (addr_decoder_common >> 0) & 3, diff --git a/src/northbridge/intel/sandybridge/raminit_shared.c b/src/northbridge/intel/sandybridge/raminit_shared.c index 543d285e9b..8ba20ac6a8 100644 --- a/src/northbridge/intel/sandybridge/raminit_shared.c +++ b/src/northbridge/intel/sandybridge/raminit_shared.c @@ -29,7 +29,7 @@ void report_memory_config(void) printk(BIOS_DEBUG, "memcfg DDR3 ref clock %d MHz\n", refclk); printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", - (mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2 + 50) / 100); + DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2, 100)); printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", (addr_decoder_common >> 0) & 3, diff --git a/src/soc/intel/broadwell/raminit.c b/src/soc/intel/broadwell/raminit.c index c55e755055..cacf8ecc89 100644 --- a/src/soc/intel/broadwell/raminit.c +++ b/src/soc/intel/broadwell/raminit.c @@ -16,6 +16,7 @@ #include <soc/romstage.h> #include <soc/systemagent.h> #include <timestamp.h> +#include <types.h> static void save_mrc_data(struct pei_data *pei_data) { @@ -46,7 +47,7 @@ static void report_memory_config(void) const u32 addr_decoder_common = mchbar_read32(MAD_CHNL); printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n", - (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100); + DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * 13333 * 2, 100)); printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n", (addr_decoder_common >> 0) & 3, |