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-rw-r--r--src/mainboard/compulab/intense_pc/romstage.c2
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c2
-rw-r--r--src/superio/smsc/sio1007/early_serial.c2
-rw-r--r--src/superio/smsc/sio1007/sio1007.h (renamed from src/superio/smsc/sio1007/chip.h)7
4 files changed, 7 insertions, 6 deletions
diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c
index 6c3d980b65..74f00c21d1 100644
--- a/src/mainboard/compulab/intense_pc/romstage.c
+++ b/src/mainboard/compulab/intense_pc/romstage.c
@@ -17,7 +17,7 @@
#include <arch/io.h>
#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
-#include <superio/smsc/sio1007/chip.h>
+#include <superio/smsc/sio1007/sio1007.h>
#include <southbridge/intel/bd82x6x/pch.h>
#define SIO_PORT 0x164e
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index a28ae78f28..ee3cec1ebf 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -19,7 +19,7 @@
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
-#include <superio/smsc/sio1007/chip.h>
+#include <superio/smsc/sio1007/sio1007.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/superio/smsc/sio1007/early_serial.c b/src/superio/smsc/sio1007/early_serial.c
index 022a1aba7c..2028e67fc3 100644
--- a/src/superio/smsc/sio1007/early_serial.c
+++ b/src/superio/smsc/sio1007/early_serial.c
@@ -15,7 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
-#include "chip.h"
+#include "sio1007.h"
void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask)
{
diff --git a/src/superio/smsc/sio1007/chip.h b/src/superio/smsc/sio1007/sio1007.h
index 78ac18a249..a99ec5c273 100644
--- a/src/superio/smsc/sio1007/chip.h
+++ b/src/superio/smsc/sio1007/sio1007.h
@@ -13,10 +13,11 @@
* GNU General Public License for more details.
*/
-#ifndef SUPERIO_SMSC_1007_CHIP_H
-#define SUPERIO_SMSC_1007_CHIP_H
+#ifndef SUPERIO_SMSC_SIO1007_H
+#define SUPERIO_SMSC_SIO1007_H
+
+#include <stdint.h>
-/* FIXME: wrong place for this! */
void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask);
int sio1007_enable_uart_at(u16 port);