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-rw-r--r--src/cpu/intel/model_206ax/finalize.c3
-rw-r--r--src/cpu/intel/model_206ax/model_206ax_init.c2
2 files changed, 2 insertions, 3 deletions
diff --git a/src/cpu/intel/model_206ax/finalize.c b/src/cpu/intel/model_206ax/finalize.c
index d51fb21847..a7754ae969 100644
--- a/src/cpu/intel/model_206ax/finalize.c
+++ b/src/cpu/intel/model_206ax/finalize.c
@@ -25,9 +25,6 @@
void intel_model_206ax_finalize_smm(void)
{
- /* Lock C-State MSR */
- msr_set_bit(MSR_PKG_CST_CONFIG_CONTROL, 15);
-
/* Lock AES-NI only if supported */
if (cpuid_ecx(1) & (1 << 25))
msr_set_bit(MSR_FEATURE_CONFIG, 0);
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 2571f8cb40..773940850d 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -256,6 +256,8 @@ static void configure_c_states(void)
msr.lo |= (1 << 25); // C3 Auto Demotion Enable
msr.lo &= ~(1 << 10); // Disable IO MWAIT redirection
msr.lo |= 7; // No package C-state limit
+
+ msr.lo |= (1 << 15); // Lock C-State MSR
wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr);
msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR);