diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/intel/avenuecity_crb/dsdt.asl | 1 | ||||
-rw-r--r-- | src/mainboard/intel/beechnutcity_crb/dsdt.asl | 1 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/chip_gen6.c | 8 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/gnr/acpi/uncore.asl | 5 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/gnr/soc_acpi.c | 56 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/include/soc/chip_common.h | 2 |
6 files changed, 72 insertions, 1 deletions
diff --git a/src/mainboard/intel/avenuecity_crb/dsdt.asl b/src/mainboard/intel/avenuecity_crb/dsdt.asl index 34c29374fa..8f84bbe6fd 100644 --- a/src/mainboard/intel/avenuecity_crb/dsdt.asl +++ b/src/mainboard/intel/avenuecity_crb/dsdt.asl @@ -13,6 +13,7 @@ DefinitionBlock( { #include <acpi/dsdt_top.asl> #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> + #include <soc/intel/xeon_sp/gnr/acpi/uncore.asl> #include <soc/intel/xeon_sp/gnr/acpi/gpe.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> #include <commonlib/include/commonlib/console/post_codes.h> diff --git a/src/mainboard/intel/beechnutcity_crb/dsdt.asl b/src/mainboard/intel/beechnutcity_crb/dsdt.asl index 34c29374fa..8f84bbe6fd 100644 --- a/src/mainboard/intel/beechnutcity_crb/dsdt.asl +++ b/src/mainboard/intel/beechnutcity_crb/dsdt.asl @@ -13,6 +13,7 @@ DefinitionBlock( { #include <acpi/dsdt_top.asl> #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> + #include <soc/intel/xeon_sp/gnr/acpi/uncore.asl> #include <soc/intel/xeon_sp/gnr/acpi/gpe.asl> #include <southbridge/intel/common/acpi/sleepstates.asl> #include <commonlib/include/commonlib/console/post_codes.h> diff --git a/src/soc/intel/xeon_sp/chip_gen6.c b/src/soc/intel/xeon_sp/chip_gen6.c index 8bbfbe871b..686b3e4dcf 100644 --- a/src/soc/intel/xeon_sp/chip_gen6.c +++ b/src/soc/intel/xeon_sp/chip_gen6.c @@ -61,6 +61,12 @@ static void iio_pci_domain_read_resources(struct device *dev) pr->Mmio64Base, pr->Mmio64Limit + 1); } +static void iio_pci_domain_fill_ssdt(const struct device *domain) +{ + soc_pci_domain_fill_ssdt(domain); + pci_domain_fill_ssdt(domain); +} + static struct device_operations iio_pcie_domain_ops = { .read_resources = iio_pci_domain_read_resources, .set_resources = pci_domain_set_resources, @@ -68,7 +74,7 @@ static struct device_operations iio_pcie_domain_ops = { #if CONFIG(HAVE_ACPI_TABLES) .acpi_name = soc_acpi_name, .write_acpi_tables = northbridge_write_acpi_tables, - .acpi_fill_ssdt = pci_domain_fill_ssdt, + .acpi_fill_ssdt = iio_pci_domain_fill_ssdt, #endif }; diff --git a/src/soc/intel/xeon_sp/gnr/acpi/uncore.asl b/src/soc/intel/xeon_sp/gnr/acpi/uncore.asl new file mode 100644 index 0000000000..bc28d62f42 --- /dev/null +++ b/src/soc/intel/xeon_sp/gnr/acpi/uncore.asl @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/intel/xeon_sp/acpi/iiostack.asl> + +/* TODO: Add other uncore specific ASL files based on needs */ diff --git a/src/soc/intel/xeon_sp/gnr/soc_acpi.c b/src/soc/intel/xeon_sp/gnr/soc_acpi.c index 6f1df7c386..c91ed16076 100644 --- a/src/soc/intel/xeon_sp/gnr/soc_acpi.c +++ b/src/soc/intel/xeon_sp/gnr/soc_acpi.c @@ -1,10 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <acpi/acpigen.h> +#include <acpi/acpigen_pci.h> #include <assert.h> #include <intelblocks/acpi.h> #include <intelblocks/pcr.h> #include <intelblocks/itss.h> #include <soc/acpi.h> +#include <soc/chip_common.h> +#include <soc/numa.h> #include <soc/soc_util.h> #include <soc/util.h> #include <soc/itss.h> @@ -39,3 +43,55 @@ void soc_power_states_generation(int core, int cores_per_package) { generate_p_state_entries(core, cores_per_package); } + +static uint32_t get_granted_pcie_features(void) +{ + return PCIE_NATIVE_HOTPLUG_CONTROL | PCIE_PME_CONTROL | + PCIE_CAP_STRUCTURE_CONTROL | PCIE_LTR_CONTROL | + PCIE_AER_CONTROL; +} + +static uint32_t get_granted_cxl_features(void) +{ + return CXL_ERROR_REPORTING_CONTROL; +} + +void soc_pci_domain_fill_ssdt(const struct device *domain) +{ + const char *name = acpi_device_name(domain); + if (!name) + return; + + acpigen_write_scope(acpi_device_scope(domain)); + acpigen_write_device(name); + + if (is_cxl_domain(domain)) { + acpigen_write_name("_HID"); + acpigen_emit_eisaid("ACPI0016"); + acpigen_write_name("_CID"); + acpigen_write_package(2); + acpigen_emit_eisaid("PNP0A08"); + acpigen_emit_eisaid("PNP0A03"); + acpigen_pop_len(); + } else { + acpigen_write_name("_HID"); + acpigen_emit_eisaid("PNP0A08"); + acpigen_write_name("_CID"); + acpigen_emit_eisaid("PNP0A03"); + } + acpigen_write_name("_UID"); + acpigen_write_string(name); + + acpigen_write_name("_PXM"); + acpigen_write_integer(device_to_pd(domain)); + + /* _OSC */ + acpigen_write_OSC_pci_domain_fixed_caps(domain, + get_granted_pcie_features(), + is_cxl_domain(domain), + get_granted_cxl_features() + ); + + acpigen_pop_len(); + acpigen_pop_len(); +} diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h index 3f4c77e15f..c5553c0f5f 100644 --- a/src/soc/intel/xeon_sp/include/soc/chip_common.h +++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h @@ -92,4 +92,6 @@ void unlock_pam_regions(void); size_t vtd_probe_bar_size(struct device *dev); +void soc_pci_domain_fill_ssdt(const struct device *domain); + #endif /* _CHIP_COMMON_H_ */ |