summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/bd82x6x/common.c21
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h1
2 files changed, 22 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/common.c b/src/southbridge/intel/bd82x6x/common.c
index f4c757a060..7163d3edc7 100644
--- a/src/southbridge/intel/bd82x6x/common.c
+++ b/src/southbridge/intel/bd82x6x/common.c
@@ -32,6 +32,27 @@ int pch_silicon_type(void)
return pch_type;
}
+bool pch_is_mobile(void)
+{
+ const u16 devids[] = {
+ PCI_DID_INTEL_6_SERIES_MOBILE_SFF, PCI_DID_INTEL_6_SERIES_MOBILE,
+ PCI_DID_INTEL_6_SERIES_UM67, PCI_DID_INTEL_6_SERIES_HM65,
+ PCI_DID_INTEL_6_SERIES_HM67, PCI_DID_INTEL_6_SERIES_QS67,
+ PCI_DID_INTEL_6_SERIES_QM67,
+ PCI_DID_INTEL_7_SERIES_MOBILE, PCI_DID_INTEL_7_SERIES_MOBILE_SFF,
+ PCI_DID_INTEL_7_SERIES_QM77, PCI_DID_INTEL_7_SERIES_QS77,
+ PCI_DID_INTEL_7_SERIES_HM77, PCI_DID_INTEL_7_SERIES_UM77,
+ PCI_DID_INTEL_7_SERIES_HM76, PCI_DID_INTEL_7_SERIES_HM75,
+ PCI_DID_INTEL_7_SERIES_HM70, PCI_DID_INTEL_7_SERIES_NM70
+ };
+ u16 devid = pci_s_read_config16(PCH_LPC_DEV, PCI_DEVICE_ID);
+
+ for (size_t i = 0; i < ARRAY_SIZE(devids); i++)
+ if (devid == devids[i])
+ return true;
+ return false;
+}
+
int pch_silicon_supported(int type, int rev)
{
int cur_type = pch_silicon_type();
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 3bb8701e5c..88c8df5c4a 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -35,6 +35,7 @@
int pch_silicon_revision(void);
int pch_silicon_type(void);
int pch_silicon_supported(int type, int rev);
+bool pch_is_mobile(void);
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
void enable_usb_bar(void);