summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/brya/variants/nereid/overridetree.cb6
-rw-r--r--src/mainboard/google/brya/variants/xivu/overridetree.cb6
2 files changed, 0 insertions, 12 deletions
diff --git a/src/mainboard/google/brya/variants/nereid/overridetree.cb b/src/mainboard/google/brya/variants/nereid/overridetree.cb
index 3cc7dc37a2..8dbc1f461a 100644
--- a/src/mainboard/google/brya/variants/nereid/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nereid/overridetree.cb
@@ -210,12 +210,6 @@ chip soc/intel/alderlake
register "wake" = "GPE0_DW1_03"
device pci 00.0 on end
end
- chip soc/intel/common/block/pcie/rtd3
- register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
- register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
- register "srcclk_pin" = "2"
- device generic 0 on end
- end
end
device ref pch_espi on
chip ec/google/chromeec
diff --git a/src/mainboard/google/brya/variants/xivu/overridetree.cb b/src/mainboard/google/brya/variants/xivu/overridetree.cb
index 3f36594a5b..9268434463 100644
--- a/src/mainboard/google/brya/variants/xivu/overridetree.cb
+++ b/src/mainboard/google/brya/variants/xivu/overridetree.cb
@@ -188,12 +188,6 @@ chip soc/intel/alderlake
register "wake" = "GPE0_DW1_03"
device pci 00.0 on end
end
- chip soc/intel/common/block/pcie/rtd3
- register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
- register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
- register "srcclk_pin" = "2"
- device generic 0 on end
- end
end
device ref pch_espi on
chip ec/google/chromeec