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-rw-r--r--src/vendorcode/cavium/bdk/libdram/dram-init-ddr3.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/cavium/bdk/libdram/dram-init-ddr3.c b/src/vendorcode/cavium/bdk/libdram/dram-init-ddr3.c
index 192a8a9194..0fcc180da8 100644
--- a/src/vendorcode/cavium/bdk/libdram/dram-init-ddr3.c
+++ b/src/vendorcode/cavium/bdk/libdram/dram-init-ddr3.c
@@ -3295,7 +3295,7 @@ int init_octeon3_ddr3_interface(bdk_node_t node,
mem_size_mbytes *= 2;
}
- /* Mask with 1 bits set for for each active rank, allowing 2 bits per dimm.
+ /* Mask with 1 bits set for each active rank, allowing 2 bits per dimm.
** This makes later calculations simpler, as a variety of CSRs use this layout.
** This init needs to be updated for dual configs (ie non-identical DIMMs).
** Bit 0 = dimm0, rank 0