4 files changed, 4 insertions, 7 deletions
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index 431744f08c..5573ec96ad 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -53,10 +53,6 @@ config EHCI_BAR
 	hex
 	default 0xe8000000
 
-config BOOTBLOCK_SOUTHBRIDGE_INIT
-	string
-	default "southbridge/intel/lynxpoint/bootblock.c"
-
 config SERIRQ_CONTINUOUS_MODE
 	bool
 	default n
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
index b18e6dafc8..62766dfe90 100644
--- a/src/southbridge/intel/lynxpoint/Makefile.inc
+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
@@ -15,6 +15,8 @@
 
 ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT),y)
 
+bootblock-y += bootblock.c
+
 ramstage-y += pch.c
 ramstage-y += azalia.c
 ramstage-y += lpc.c
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index 16f4ef90bc..69fdd611d2 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -14,6 +14,7 @@
  */
 
 #include <device/pci_ops.h>
+#include <cpu/intel/car/bootblock.h>
 #include "pch.h"
 
 /*
@@ -69,7 +70,7 @@ static void set_spi_speed(void)
 	SPIBAR8(SSFC + 2) = ssfc;
 }
 
-static void bootblock_southbridge_init(void)
+void bootblock_early_southbridge_init(void)
 {
 	map_rcba();
 	enable_spi_prefetch();
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index 3d2d2c48fa..f615507dad 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -116,8 +116,6 @@ int early_pch_init(const void *gpio_map,
 
 	mainboard_config_superio();
 
-	console_init();
-
 	pch_generic_setup();
 
 	/* Enable SMBus for reading SPDs. */