summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/intel/lynxpoint')
-rw-r--r--src/southbridge/intel/lynxpoint/me_9.x.c59
-rw-r--r--src/southbridge/intel/lynxpoint/me_status.c7
2 files changed, 29 insertions, 37 deletions
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 59a8666547..1c45e2d99b 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -66,11 +66,13 @@ void intel_me_mbp_clear(pci_devfn_t dev);
void intel_me_mbp_clear(struct device *dev);
#endif
-#if CONFIG(DEBUG_INTEL_ME)
static void mei_dump(void *ptr, int dword, int offset, const char *type)
{
struct mei_csr *csr;
+ if (!CONFIG(DEBUG_INTEL_ME))
+ return;
+
printk(BIOS_SPEW, "%-9s[%02x] : ", type, offset);
switch (offset) {
@@ -96,9 +98,6 @@ static void mei_dump(void *ptr, int dword, int offset, const char *type)
break;
}
}
-#else
-# define mei_dump(ptr,dword,offset,type) do {} while (0)
-#endif
/*
* ME/MEI access helpers using memcpy to avoid aliasing.
@@ -380,7 +379,6 @@ static int mei_recv_msg(void *header, int header_bytes,
return mei_wait_for_me_ready();
}
-#if CONFIG(DEBUG_INTEL_ME) || defined(__SMM__)
static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi,
void *req_data, int req_bytes,
void *rsp_data, int rsp_bytes)
@@ -418,7 +416,6 @@ static inline int mei_sendrecv_mkhi(struct mkhi_header *mkhi,
return 0;
}
-#endif /* CONFIG_DEBUG_INTEL_ME || __SMM__ */
/*
* mbp give up routine. This path is taken if hfs.mpb_rdy is 0 or the read
@@ -469,8 +466,7 @@ void intel_me_mbp_clear(struct device *dev)
}
}
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) && !defined(__SMM__)
-static void me_print_fw_version(mbp_fw_version_name *vers_name)
+static void __unused me_print_fw_version(mbp_fw_version_name *vers_name)
{
if (!vers_name) {
printk(BIOS_ERR, "ME: mbp missing version report\n");
@@ -482,7 +478,6 @@ static void me_print_fw_version(mbp_fw_version_name *vers_name)
vers_name->hotfix_version, vers_name->build_version);
}
-#if CONFIG(DEBUG_INTEL_ME)
static inline void print_cap(const char *name, int state)
{
printk(BIOS_DEBUG, "ME Capability: %-41s : %sabled\n",
@@ -510,7 +505,7 @@ static int mkhi_get_fwcaps(mbp_mefwcaps *cap)
}
/* Get ME Firmware Capabilities */
-static void me_print_fwcaps(mbp_mefwcaps *cap)
+static void __unused me_print_fwcaps(mbp_mefwcaps *cap)
{
mbp_mefwcaps local_caps;
if (!cap) {
@@ -535,8 +530,6 @@ static void me_print_fwcaps(mbp_mefwcaps *cap)
print_cap("TLS", cap->tls);
print_cap("Wireless LAN (WLAN)", cap->wlan);
}
-#endif /* CONFIG_DEBUG_INTEL_ME */
-#endif
#if CONFIG(CHROMEOS) && 0 /* DISABLED */
/* Tell ME to issue a global reset */
@@ -851,21 +844,21 @@ static void intel_me_init(struct device *dev)
if (intel_me_read_mbp(&mbp_data, dev))
return;
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
- me_print_fw_version(mbp_data.fw_version_name);
-#if CONFIG(DEBUG_INTEL_ME)
- me_print_fwcaps(mbp_data.fw_capabilities);
-#endif
+ if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
+ me_print_fw_version(mbp_data.fw_version_name);
- if (mbp_data.plat_time) {
- printk(BIOS_DEBUG, "ME: Wake Event to ME Reset: %u ms\n",
- mbp_data.plat_time->wake_event_mrst_time_ms);
- printk(BIOS_DEBUG, "ME: ME Reset to Platform Reset: %u ms\n",
- mbp_data.plat_time->mrst_pltrst_time_ms);
- printk(BIOS_DEBUG, "ME: Platform Reset to CPU Reset: %u ms\n",
- mbp_data.plat_time->pltrst_cpurst_time_ms);
+ if (CONFIG(DEBUG_INTEL_ME))
+ me_print_fwcaps(mbp_data.fw_capabilities);
+
+ if (mbp_data.plat_time) {
+ printk(BIOS_DEBUG, "ME: Wake Event to ME Reset: %u ms\n",
+ mbp_data.plat_time->wake_event_mrst_time_ms);
+ printk(BIOS_DEBUG, "ME: ME Reset to Platform Reset: %u ms\n",
+ mbp_data.plat_time->mrst_pltrst_time_ms);
+ printk(BIOS_DEBUG, "ME: Platform Reset to CPU Reset: %u ms\n",
+ mbp_data.plat_time->pltrst_cpurst_time_ms);
+ }
}
-#endif
/* Set clock enables according to devicetree */
if (config && config->icc_clock_disable)
@@ -1004,15 +997,15 @@ static int intel_me_read_mbp(me_bios_payload *mbp_data, struct device *dev)
#endif
/* Dump out the MBP contents. */
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
- printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n",
- mbp->header.num_entries, mbp->header.mbp_size);
-#if CONFIG(DEBUG_INTEL_ME)
- for (i = 0; i < mbp->header.mbp_size - 1; i++) {
- printk(BIOS_INFO, "ME MBP: %04x: 0x%08x\n", i, mbp->data[i]);
+ if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG) {
+ printk(BIOS_INFO, "ME MBP: Header: items: %d, size dw: %d\n",
+ mbp->header.num_entries, mbp->header.mbp_size);
+ if (CONFIG(DEBUG_INTEL_ME)) {
+ for (i = 0; i < mbp->header.mbp_size - 1; i++) {
+ printk(BIOS_INFO, "ME MBP: %04x: 0x%08x\n", i, mbp->data[i]);
+ }
+ }
}
-#endif
-#endif
#define ASSIGN_FIELD_PTR(field_,val_) \
{ \
diff --git a/src/southbridge/intel/lynxpoint/me_status.c b/src/southbridge/intel/lynxpoint/me_status.c
index 9ca55529c3..ad8362d9d1 100644
--- a/src/southbridge/intel/lynxpoint/me_status.c
+++ b/src/southbridge/intel/lynxpoint/me_status.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include "me.h"
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
/* HFS1[3:0] Current Working State Values */
static const char *me_cws_values[] = {
[ME_HFS_CWS_RESET] = "Reset",
@@ -138,11 +137,12 @@ static const char *me_progress_policy_values[] = {
[ME_HFS2_STATE_POLICY_DESCRIPTOR_ERR] = "ME cannot access the chipset descriptor region",
[ME_HFS2_STATE_POLICY_VSCC_NO_MATCH] = "Required VSCC values for flash parts do not match",
};
-#endif
void intel_me_status(struct me_hfs *hfs, struct me_hfs2 *hfs2)
{
-#if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL >= BIOS_DEBUG)
+ if (CONFIG_DEFAULT_CONSOLE_LOGLEVEL < BIOS_DEBUG)
+ return;
+
/* Check Current States */
printk(BIOS_DEBUG, "ME: FW Partition Table : %s\n",
hfs->fpt_bad ? "BAD" : "OK");
@@ -206,5 +206,4 @@ void intel_me_status(struct me_hfs *hfs, struct me_hfs2 *hfs2)
hfs2->progress_code, hfs2->current_state);
}
printk(BIOS_DEBUG, "\n");
-#endif
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-11 10:30:20 +0000