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-rw-r--r--src/soc/amd/sabrina/Kconfig1
-rw-r--r--src/soc/amd/sabrina/i2c.c7
2 files changed, 1 insertions, 7 deletions
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig
index 66719a6ce3..6924ce4778 100644
--- a/src/soc/amd/sabrina/Kconfig
+++ b/src/soc/amd/sabrina/Kconfig
@@ -53,7 +53,6 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_GRAPHICS # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_HAS_ESPI # TODO: Check if this is still correct
select SOC_AMD_COMMON_BLOCK_I2C
- select SOC_AMD_COMMON_BLOCK_I2C_PAD_CTRL
select SOC_AMD_COMMON_BLOCK_I23C_PAD_CTRL
select SOC_AMD_COMMON_BLOCK_IOMMU
select SOC_AMD_COMMON_BLOCK_LPC # TODO: Check if this is still correct
diff --git a/src/soc/amd/sabrina/i2c.c b/src/soc/amd/sabrina/i2c.c
index 1008f564fd..e805eff339 100644
--- a/src/soc/amd/sabrina/i2c.c
+++ b/src/soc/amd/sabrina/i2c.c
@@ -39,12 +39,7 @@ void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
if (bus >= ARRAY_SIZE(config->i2c_pad))
return;
- /* The I/O pads of I2C0..2 are the new I23C pads and the I/O pads of I2C3 still are the
- same I2C pads as in Picasso and Cezanne. */
- if (bus <= 2)
- fch_i23c_pad_init(bus, cfg->speed, &config->i2c_pad[bus]);
- else
- fch_i2c_pad_init(bus, cfg->speed, &config->i2c_pad[bus]);
+ fch_i23c_pad_init(bus, cfg->speed, &config->i2c_pad[bus]);
}
const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs)