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-rw-r--r--src/soc/intel/xeon_sp/cpx/romstage.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/romstage.c b/src/soc/intel/xeon_sp/cpx/romstage.c
index 7093ec9463..96949fd8af 100644
--- a/src/soc/intel/xeon_sp/cpx/romstage.c
+++ b/src/soc/intel/xeon_sp/cpx/romstage.c
@@ -57,5 +57,9 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
/* Needed to avoid FSP-M reset. The default value of 0x01 is for MinPlatform */
m_cfg->PchAdrEn = 0x02;
+ /* Make all IIO PCIe ports and port menus visible */
+ m_cfg->PEXPHIDE = 0x0;
+ m_cfg->HidePEXPMenu = 0x0;
+
mainboard_memory_init_params(mupd);
}