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-rw-r--r--src/soc/intel/broadwell/ramstage.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/ramstage.c b/src/soc/intel/broadwell/ramstage.c
index e1883f2ecd..706536940d 100644
--- a/src/soc/intel/broadwell/ramstage.c
+++ b/src/soc/intel/broadwell/ramstage.c
@@ -23,6 +23,7 @@
#include <soc/ramstage.h>
#include <soc/intel/broadwell/chip.h>
#include <soc/intel/common/acpi.h>
+#include <assert.h>
/* Save wake source information for calculating ACPI _SWS values */
int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
@@ -31,6 +32,8 @@ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
static uint32_t gpe0_sts[GPE0_REG_MAX];
int i;
+ assert(ps != NULL);
+
*pm1 = ps->pm1_sts & ps->pm1_en;
/* Mask off GPE0 status bits that are not enabled */