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-rw-r--r--src/soc/intel/alderlake/chip.h7
-rw-r--r--src/soc/intel/alderlake/fsp_params.c4
2 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index 591d8be52f..df978a99e6 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -744,6 +744,13 @@ struct soc_intel_alderlake_config {
* Set this to 1 in order to disable SaGV reordering.
*/
bool disable_sagv_reorder;
+
+ /*
+ * Enable or Disable hwp scalability tracking.
+ * Default is set to 1.
+ * Set this to 0 in order to disable hwp scalability tracking.
+ */
+ bool enable_hwp_scalability_tracking;
};
typedef struct soc_intel_alderlake_config config_t;
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 214a70075b..657e089a63 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -1024,6 +1024,10 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg,
s_cfg->C1e = 0;
else
s_cfg->C1e = 1;
+
+#if CONFIG(SOC_INTEL_RAPTORLAKE)
+ s_cfg->EnableHwpScalabilityTracking = config->enable_hwp_scalability_tracking;
+#endif
}
static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg,