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-rw-r--r--src/soc/amd/common/block/include/amdblocks/aoac.h2
-rw-r--r--src/soc/intel/quark/include/soc/QuarkNcSocId.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/aoac.h b/src/soc/amd/common/block/include/amdblocks/aoac.h
index f4a00c73a7..455f32d9e6 100644
--- a/src/soc/amd/common/block/include/amdblocks/aoac.h
+++ b/src/soc/amd/common/block/include/amdblocks/aoac.h
@@ -10,7 +10,7 @@
#define AOAC_DEV_D3_STATE(device) (AOAC_DEV_D3_CTL(device) + 1)
/* Bit definitions for Device D3 Control AOACx0000[40...7E; even byte addresses] */
-#define FCH_AOAC_TARGET_DEVICE_STATE (BIT(0) + BIT(1))
+#define FCH_AOAC_TARGET_DEVICE_STATE (BIT(0) | BIT(1))
#define FCH_AOAC_D0_UNINITIALIZED 0
#define FCH_AOAC_D0_INITIALIZED 1
#define FCH_AOAC_D1_2_3_WARM 2
diff --git a/src/soc/intel/quark/include/soc/QuarkNcSocId.h b/src/soc/intel/quark/include/soc/QuarkNcSocId.h
index e4015a2e7c..4a62c04eeb 100644
--- a/src/soc/intel/quark/include/soc/QuarkNcSocId.h
+++ b/src/soc/intel/quark/include/soc/QuarkNcSocId.h
@@ -807,7 +807,7 @@
#define B_QNC_RCRB_SPIOPTYPE_NOADD_READ 0
#define B_QNC_RCRB_SPIOPTYPE_NOADD_WRITE (BIT0)
#define B_QNC_RCRB_SPIOPTYPE_ADD_READ (BIT1)
-#define B_QNC_RCRB_SPIOPTYPE_ADD_WRITE (BIT0 + BIT1)
+#define B_QNC_RCRB_SPIOPTYPE_ADD_WRITE (BIT0 | BIT1)
// Opcode Menu Configuration //R_OPMENU
#define R_QNC_RCRB_SPIOPMENU (R_QNC_RCRB_SPIBASE + 0x58)