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-rw-r--r--src/soc/intel/elkhartlake/chip.h2
-rw-r--r--src/soc/intel/tigerlake/chip.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index e5c7f54046..d446ef0ffa 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -128,7 +128,7 @@ struct soc_intel_elkhartlake_config {
uint32_t gen4_dec;
/* Enable S0iX support */
- int s0ix_enable;
+ bool s0ix_enable;
/* Enable DPTF support */
int dptf_enable;
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index e8d417e3a8..6785ebaaeb 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -141,7 +141,7 @@ struct soc_intel_tigerlake_config {
uint32_t gen4_dec;
/* Enable S0iX support */
- int s0ix_enable;
+ bool s0ix_enable;
/* S0iX: Selectively disable individual sub-states, by default all are enabled. */
enum lpm_state_mask LpmStateDisableMask;