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-rw-r--r--src/soc/intel/alderlake/fsp_params.c6
-rw-r--r--src/soc/intel/alderlake/romstage/fsp_params.c23
2 files changed, 20 insertions, 9 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 723ad92b66..157bf351df 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -511,8 +511,10 @@ static void fill_fsps_xdci_params(FSP_S_CONFIG *s_cfg,
static void fill_fsps_uart_params(FSP_S_CONFIG *s_cfg,
const struct soc_intel_alderlake_config *config)
{
- if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER))
- s_cfg->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)fsp_debug_event_handler);
+ if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER) && CONFIG(CONSOLE_SERIAL) &&
+ CONFIG(FSP_ENABLE_SERIAL_DEBUG))
+ s_cfg->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)
+ fsp_debug_event_handler);
/* PCH UART selection for FSP Debug */
s_cfg->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;
ASSERT(ARRAY_SIZE(s_cfg->SerialIoUartAutoFlow) > CONFIG_UART_FOR_CONSOLE);
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index fe21b41893..83ce074506 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -324,9 +324,6 @@ static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg,
static void fill_fspm_trace_params(FSP_M_CONFIG *m_cfg,
const struct soc_intel_alderlake_config *config)
{
- /* Set MRC debug level */
- m_cfg->SerialDebugMrcLevel = fsp_map_console_log_level();
-
/* Set debug probe type */
m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT;
@@ -367,10 +364,22 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
FSPM_ARCH_UPD *arch_upd = &mupd->FspmArchUpd;
- if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER))
- arch_upd->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)
- fsp_debug_event_handler);
-
+ if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER)) {
+ if (CONFIG(CONSOLE_SERIAL) && CONFIG(FSP_ENABLE_SERIAL_DEBUG)) {
+ enum fsp_log_level log_level = fsp_map_console_log_level();
+ arch_upd->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)
+ fsp_debug_event_handler);
+ /* Set Serial debug message level */
+ m_cfg->PcdSerialDebugLevel = log_level;
+ /* Set MRC debug level */
+ m_cfg->SerialDebugMrcLevel = log_level;
+ } else {
+ /* Disable Serial debug message */
+ m_cfg->PcdSerialDebugLevel = 0;
+ /* Disable MRC debug message */
+ m_cfg->SerialDebugMrcLevel = 0;
+ }
+ }
config = config_of_soc();
soc_memory_init_params(m_cfg, config);