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-rw-r--r--src/soc/intel/denverton_ns/Kconfig9
-rw-r--r--src/soc/intel/denverton_ns/Makefile.inc2
2 files changed, 9 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 9a611271ab..a74250bab3 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -79,6 +79,15 @@ config FSP_S_ADDR
help
The memory location of the Intel FSP-S binary for this platform.
+config FSP_HEADER_PATH
+ string
+ default "3rdparty/fsp/DenvertonNSFspBinPkg/Include/"
+
+config FSP_FD_PATH
+ string
+ depends on FSP_USE_REPO
+ default "3rdparty/fsp/DenvertonNSFspBinPkg/FspBin/DenvertonNSFsp.fd"
+
# CAR memory layout on DENVERTON_NS hardware:
## CAR base address - 0xfef00000
## CAR size 1MB - 0x100 (0xfff00)
diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc
index 4050f61811..7529892dcc 100644
--- a/src/soc/intel/denverton_ns/Makefile.inc
+++ b/src/soc/intel/denverton_ns/Makefile.inc
@@ -86,10 +86,8 @@ verstage-y += tsc_freq.c
verstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c
CPPFLAGS_common += -I$(src)/soc/intel/denverton_ns/include
-CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/denverton_ns
##Set FSP binary blobs memory location
-
$(call strip_quotes,$(CONFIG_FSP_T_CBFS))-options := -b $(CONFIG_FSP_T_ADDR) --xip
$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) --xip
$(call strip_quotes,$(CONFIG_FSP_S_CBFS))-options := -b $(CONFIG_FSP_S_ADDR) --xip