diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/genoa/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/genoa/reset.c | 27 |
2 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa/Makefile.inc index 56a98e6b48..efbd3b1275 100644 --- a/src/soc/amd/genoa/Makefile.inc +++ b/src/soc/amd/genoa/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_SOC_AMD_GENOA),y) all-y += mmap_boot.c +all-y += reset.c all-y += config.c bootblock-y += early_fch.c diff --git a/src/soc/amd/genoa/reset.c b/src/soc/amd/genoa/reset.c new file mode 100644 index 0000000000..ac0c981718 --- /dev/null +++ b/src/soc/amd/genoa/reset.c @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <arch/io.h> +#include <cf9_reset.h> +#include <reset.h> +#include <soc/southbridge.h> +#include <amdblocks/acpimmio.h> +#include <amdblocks/reset.h> + +void do_cold_reset(void) +{ + /* De-assert and then assert all PwrGood signals on CF9 reset. */ + pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) | + TOGGLE_ALL_PWR_GOOD); + outb(RST_CPU | SYS_RST, RST_CNT); +} + +void do_warm_reset(void) +{ + /* Warm resets are not supported and must be executed as cold */ + do_cold_reset(); +} + +void do_board_reset(void) +{ + do_cold_reset(); +} |