diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/intel/braswell/Kconfig | 3 |
3 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 6ff135e6a8..bd55b71f0f 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -103,6 +103,9 @@ config DCACHE_RAM_SIZE hex default 0x10000 +config PRERAM_CBFS_CACHE_SIZE + default 0x0 + config DCACHE_BSP_STACK_SIZE hex default 0x4000 diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 13fd201f9f..dbadbf1105 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -110,6 +110,9 @@ config DCACHE_RAM_SIZE and/or romstage. Note DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE must add up to a power of 2. +config PRERAM_CBFS_CACHE_SIZE + default 0x0 + config DCACHE_RAM_MRC_VAR_SIZE hex default 0x8000 diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index ba6450bec7..5aeb9e56ec 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -97,6 +97,9 @@ config DCACHE_RAM_SIZE and/or romstage. Note DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE must add up to a power of 2. +config PRERAM_CBFS_CACHE_SIZE + default 0x0 + config ENABLE_BUILTIN_COM1 bool "Enable builtin COM1 Serial Port" default n |