diff options
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/fsp_baytrail/Kconfig | 3 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/fsp_baytrail/pmutil.c | 25 |
3 files changed, 27 insertions, 2 deletions
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 1d7e64a658..68084bc885 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -47,6 +47,9 @@ config CPU_SPECIFIC_OPTIONS # Microcode header files are delivered in FSP package select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config SOC_INTEL_FSP_BAYTRAIL_MD bool default n diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc index e01a944afd..0cf99dea4c 100644 --- a/src/soc/intel/fsp_baytrail/Makefile.inc +++ b/src/soc/intel/fsp_baytrail/Makefile.inc @@ -42,6 +42,7 @@ ramstage-y += northcluster.c ramstage-y += ramstage.c ramstage-y += gpio.c romstage-y += gpio.c +romstage-y += pmutil.c ramstage-y += pmutil.c ramstage-y += southcluster.c romstage-y += reset.c diff --git a/src/soc/intel/fsp_baytrail/pmutil.c b/src/soc/intel/fsp_baytrail/pmutil.c index 33ecc09488..402842eb74 100644 --- a/src/soc/intel/fsp_baytrail/pmutil.c +++ b/src/soc/intel/fsp_baytrail/pmutil.c @@ -15,14 +15,16 @@ #include <stdint.h> #include <arch/io.h> +#include <cbmem.h> #include <console/console.h> #include <soc/iomap.h> #include <soc/lpc.h> #include <soc/pci_devs.h> #include <soc/pmc.h> +#include <security/vboot/vbnv.h> -#if defined(__SMM__) +#if defined(__SIMPLE_DEVICE__) static const pci_devfn_t pcu_dev = PCI_DEV(0, PCU_DEV, 0); @@ -31,7 +33,7 @@ static inline pci_devfn_t get_pcu_dev(void) return pcu_dev; } -#else /* !__SMM__ */ +#else /* !__SIMPLE_DEVICE__ */ #include <device/device.h> #include <device/pci.h> @@ -358,3 +360,22 @@ void clear_pmc_status(void) write32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1), gen_pmcon1 & ~RPS); write32((u32 *)(PMC_BASE_ADDRESS + PRSTS), prsts); } + +int vbnv_cmos_failed(void) +{ + uint32_t gen_pmcon1; + int rtc_fail; + struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); + + if (ps != NULL) + gen_pmcon1 = ps->gen_pmcon1; + else + gen_pmcon1 = read32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1)); + + rtc_fail = !!(gen_pmcon1 & RPS); + + if (rtc_fail) + printk(BIOS_DEBUG, "RTC failure.\n"); + + return rtc_fail; +} |