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-rw-r--r--src/soc/intel/xeon_sp/cpx/Makefile.inc1
-rw-r--r--src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h2
-rw-r--r--src/soc/intel/xeon_sp/cpx/soc_smihandler_util.c8
-rw-r--r--src/soc/intel/xeon_sp/skx/Makefile.inc1
-rw-r--r--src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h2
-rw-r--r--src/soc/intel/xeon_sp/skx/soc_smihandler_util.c8
-rw-r--r--src/soc/intel/xeon_sp/smihandler.c20
-rw-r--r--src/soc/intel/xeon_sp/spr/Makefile.inc1
-rw-r--r--src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h3
-rw-r--r--src/soc/intel/xeon_sp/spr/soc_smihandler_util.c19
10 files changed, 62 insertions, 3 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc
index 911cf66e4a..745e032137 100644
--- a/src/soc/intel/xeon_sp/cpx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc
@@ -12,6 +12,7 @@ romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
ramstage-y += chip.c cpu.c soc_util.c soc_acpi.c
ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cooperlake_sp
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
index ef918c6d00..55268a71b7 100644
--- a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
@@ -183,4 +183,6 @@
#define IIO_DFX_TSWCTL0 0x30c
#define IIO_DFX_LCK_CTL 0x504
+pci_devfn_t soc_get_ubox_pmon_dev(void);
+
#endif /* _SOC_PCI_DEVS_H_ */
diff --git a/src/soc/intel/xeon_sp/cpx/soc_smihandler_util.c b/src/soc/intel/xeon_sp/cpx/soc_smihandler_util.c
new file mode 100644
index 0000000000..6f772cc210
--- /dev/null
+++ b/src/soc/intel/xeon_sp/cpx/soc_smihandler_util.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/pci_devs.h>
+
+pci_devfn_t soc_get_ubox_pmon_dev(void)
+{
+ return UBOX_DEV_PMON;
+}
diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc
index f7599a34c1..0f75eec864 100644
--- a/src/soc/intel/xeon_sp/skx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/skx/Makefile.inc
@@ -21,6 +21,7 @@ ramstage-y += cpu.c
ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
ramstage-y += hob_display.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/skx/include -I$(src)/soc/intel/xeon_sp/skx
diff --git a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
index 4b46ec890b..3d518fa5e2 100644
--- a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
+++ b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
@@ -164,4 +164,6 @@
#define IIO_DFX_TSWCTL0 0x30c
#define IIO_DFX_LCK_CTL 0x504
+pci_devfn_t soc_get_ubox_pmon_dev(void);
+
#endif /* _SOC_PCI_DEVS_H_ */
diff --git a/src/soc/intel/xeon_sp/skx/soc_smihandler_util.c b/src/soc/intel/xeon_sp/skx/soc_smihandler_util.c
new file mode 100644
index 0000000000..6f772cc210
--- /dev/null
+++ b/src/soc/intel/xeon_sp/skx/soc_smihandler_util.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/pci_devs.h>
+
+pci_devfn_t soc_get_ubox_pmon_dev(void)
+{
+ return UBOX_DEV_PMON;
+}
diff --git a/src/soc/intel/xeon_sp/smihandler.c b/src/soc/intel/xeon_sp/smihandler.c
index d644447aee..cb8658f694 100644
--- a/src/soc/intel/xeon_sp/smihandler.c
+++ b/src/soc/intel/xeon_sp/smihandler.c
@@ -57,9 +57,23 @@ void smihandler_soc_at_finalize(void)
{
/* SMM_FEATURE_CONTROL can only be written within SMM. */
printk(BIOS_DEBUG, "Lock SMM_FEATURE_CONTROL\n");
- const pci_devfn_t dev = UBOX_DEV_PMON;
- pci_or_config32(dev, SMM_FEATURE_CONTROL,
- SMM_CODE_CHK_EN | SMM_FEATURE_CONTROL_LOCK);
+ pci_devfn_t pcie_offset = soc_get_ubox_pmon_dev();
+ if (!pcie_offset) {
+ printk(BIOS_ERR, "UBOX PMON is not found, cannot lock SMM_FEATURE_CONTROL!\n");
+ return;
+ }
+
+ u32 val;
+ val = pci_s_read_config32(pcie_offset, SMM_FEATURE_CONTROL);
+ val |= (SMM_CODE_CHK_EN | SMM_FEATURE_CONTROL_LOCK);
+ pci_s_write_config32(pcie_offset, SMM_FEATURE_CONTROL, val);
+}
+
+/*
+ * This is the generic entry for SOC SMIs
+ */
+void cpu_smi_handler(void)
+{
}
diff --git a/src/soc/intel/xeon_sp/spr/Makefile.inc b/src/soc/intel/xeon_sp/spr/Makefile.inc
index 2ead6538e5..3e4f9cd329 100644
--- a/src/soc/intel/xeon_sp/spr/Makefile.inc
+++ b/src/soc/intel/xeon_sp/spr/Makefile.inc
@@ -16,6 +16,7 @@ ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c xhci.c numa.c reset.
ramstage-y += crashlog.c
ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += soc_smihandler_util.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/spr/include -I$(src)/soc/intel/xeon_sp/spr
endif ## CONFIG_SOC_INTEL_SAPPHIRERAPIDS_SP
diff --git a/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h
index fba3c683e8..8d112cb7fc 100644
--- a/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h
+++ b/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h
@@ -4,6 +4,7 @@
#define _SOC_PCI_DEVS_H_
#include <device/pci_def.h>
+#include <device/pci_type.h>
#include <types.h>
#define _SA_DEVFN(slot) PCI_DEVFN(SA_DEV_SLOT_##slot, 0)
@@ -230,4 +231,6 @@
#define BIOS_CRASHLOG_CTL 0x158
#define CRASHLOG_CTL_DIS BIT(2)
+pci_devfn_t soc_get_ubox_pmon_dev(void);
+
#endif /* _SOC_PCI_DEVS_H_ */
diff --git a/src/soc/intel/xeon_sp/spr/soc_smihandler_util.c b/src/soc/intel/xeon_sp/spr/soc_smihandler_util.c
new file mode 100644
index 0000000000..b2700d5d4a
--- /dev/null
+++ b/src/soc/intel/xeon_sp/spr/soc_smihandler_util.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cpu/x86/msr.h>
+#include <device/pci.h>
+#include <soc/msr.h>
+#include <soc/pci_devs.h>
+
+pci_devfn_t soc_get_ubox_pmon_dev(void)
+{
+ msr_t msr = rdmsr(MSR_CPU_BUSNO);
+ u16 bus;
+
+ if (msr.hi & BUSNO_VALID)
+ bus = msr.lo & 0xff;
+ else
+ return 0;
+
+ return PCI_DEV(bus, UBOX_DECS_DEV, UBOX_URACU_FUNC);
+}