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Diffstat (limited to 'src/soc/intel/common/block')
| -rw-r--r-- | src/soc/intel/common/block/cse/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index 55a2b49194..2962a1472e 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -54,6 +54,19 @@ config SOC_INTEL_CSE_SEND_EOP_EARLY In later stages, CSE might be busy and might require more time to process EOP command. SoC can use this Kconfig to send EOP earlier by itself. +config SOC_INTEL_CSE_SEND_EOP_LATE + bool + depends on SOC_INTEL_COMMON_BLOCK_CSE + help + Use this config to send End Of Post (EOP) late (even after CSE `final` operation) + using boot state either `BS_PAYLOAD_BOOT` or `BS_PAYLOAD_LOAD` from common code + in order to reduce time required to send EOP and getting CSE response. + It has been observed that CSE might be busy and might require more time to + process the EOP command. + SoC can use this Kconfig to send EOP later by itself. + Starting with Jasper Lake, coreboot sends EOP before loading payload hence, this + config is applicable for those platforms. + config SOC_INTEL_CSE_LITE_SKU bool default n |