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Diffstat (limited to 'src/soc/intel/common/block/cpu/Kconfig')
| -rw-r--r-- | src/soc/intel/common/block/cpu/Kconfig | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index 132480482a..8b30dcf12c 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -18,6 +18,30 @@ config SOC_INTEL_COMMON_BLOCK_CPU_MPINIT ensured that all MTRRs are re-programmed based on the DRAM resource settings. +choice + prompt "Application Processors (AP) Feature Programming Configuration to use" + default USE_FSP_FEATURE_PROGRAM_ON_APS if MP_SERVICES_PPI_V1 || MP_SERVICES_PPI_V2 + default USE_COREBOOT_MP_INIT if MP_SERVICES_PPI_V2_NOOP + +config USE_FSP_FEATURE_PROGRAM_ON_APS + bool "Allow FSP running CPU feature programming on MP init" + help + Upon selection, coreboot brings APs from reset and the FSP runs feature programming. + +config USE_COREBOOT_MP_INIT + bool "Use coreboot MP init" + # FSP assumes ownership of the APs (Application Processors) + # upon passing `NULL` pointer to the CpuMpPpi FSP-S UPD. + # Hence, select `MP_SERVICES_PPI_V2_NOOP` config to pass a valid + # pointer to the CpuMpPpi UPD with FSP_UNSUPPORTED type APIs. + # This will protect APs from getting hijacked by FSP while coreboot + # decides to set SkipMpInit UPD. + select RELOAD_MICROCODE_PATCH + help + Upon selection, coreboot performs MP Init. + +endchoice + config SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE bool depends on SOC_INTEL_COMMON_BLOCK_CPU |