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-rw-r--r--src/soc/intel/cannonlake/include/soc/cpu.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/cpu.h b/src/soc/intel/cannonlake/include/soc/cpu.h
index b356d3a9b8..3542a2b8a4 100644
--- a/src/soc/intel/cannonlake/include/soc/cpu.h
+++ b/src/soc/intel/cannonlake/include/soc/cpu.h
@@ -22,9 +22,6 @@
#define C9_POWER 0xc8
#define C10_POWER 0xc8
-/* Common Timer Copy (CTC) frequency - 24MHz. */
-#define CTC_FREQ 24000000
-
#define C_STATE_LATENCY_MICRO_SECONDS(limit, base) \
(((1 << ((base)*5)) * (limit)) / 1000)
#define C_STATE_LATENCY_FROM_LAT_REG(reg) \