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-rw-r--r--src/soc/amd/common/block/pi/agesawrapper.c3
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc1
-rw-r--r--src/soc/amd/stoneyridge/iommu.c55
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c2
4 files changed, 60 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index 7ef2bdacaf..f2ece80f62 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -324,6 +324,9 @@ AGESA_STATUS agesawrapper_amdinitlate(void)
*/
AMD_LATE_PARAMS *LateParams = create_struct(&AmdParamStruct);
+ LateParams->GnbLateConfiguration.GnbIoapicId = CONFIG_MAX_CPUS + 1;
+ LateParams->GnbLateConfiguration.FchIoapicId = CONFIG_MAX_CPUS;
+
timestamp_add_now(TS_AGESA_INIT_LATE_START);
Status = AmdInitLate(LateParams);
timestamp_add_now(TS_AGESA_INIT_LATE_DONE);
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index a8db2c25a1..c54b65251c 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -97,6 +97,7 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-y += gpio.c
ramstage-y += hda.c
+ramstage-y += iommu.c
ramstage-y += monotonic_timer.c
ramstage-y += southbridge.c
ramstage-y += sb_util.c
diff --git a/src/soc/amd/stoneyridge/iommu.c b/src/soc/amd/stoneyridge/iommu.c
new file mode 100644
index 0000000000..e33402ac43
--- /dev/null
+++ b/src/soc/amd/stoneyridge/iommu.c
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <lib.h>
+
+static void iommu_read_resources(struct device *dev)
+{
+ struct resource *res;
+
+ /* Get the normal pci resources of this device */
+ pci_dev_read_resources(dev);
+
+ /* Add an extra subtractive resource for both memory and I/O. */
+ res = new_resource(dev, 0x44);
+ res->size = 512 * 1024;
+ res->align = log2(res->size);
+ res->gran = log2(res->size);
+ res->limit = 0xffffffff; /* 4G */
+ res->flags = IORESOURCE_MEM;
+}
+
+static struct pci_operations lops_pci = {
+ .set_subsystem = pci_dev_set_subsystem,
+};
+
+static struct device_operations iommu_ops = {
+ .read_resources = iommu_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = 0,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
+};
+
+static const struct pci_driver iommu_driver __pci_driver = {
+ .ops = &iommu_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU,
+};
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 912daa05e2..95c2a073cb 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -508,7 +508,7 @@ __weak void set_board_env_params(GNB_ENV_CONFIGURATION *params) { }
void SetNbEnvParams(GNB_ENV_CONFIGURATION *params)
{
- params->IommuSupport = FALSE;
+ params->IommuSupport = TRUE;
set_board_env_params(params);
}