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-rw-r--r--src/soc/amd/common/acpi/pci_root.asl19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/soc/amd/common/acpi/pci_root.asl b/src/soc/amd/common/acpi/pci_root.asl
new file mode 100644
index 0000000000..46d15b7b8d
--- /dev/null
+++ b/src/soc/amd/common/acpi/pci_root.asl
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#define ROOT_BRIDGE(acpi_name) \
+ Device(acpi_name) { \
+ Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */ \
+ Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */ \
+ Method (_OSC, 4, NotSerialized) { \
+ /* Check for proper PCI/PCIe UUID */ \
+ If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) \
+ { \
+ /* Let OS control everything */ \
+ Return(Arg3) \
+ } Else { \
+ CreateDWordField(Arg3, 0, CDW1) \
+ CDW1 = CDW1 | 4 /* Unrecognized UUID, so set bit 2 to 1 */ \
+ Return(Arg3) \
+ } \
+ } \
+ }