diff options
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r-- | src/soc/amd/picasso/aoac.c | 10 | ||||
-rw-r--r-- | src/soc/amd/picasso/include/soc/southbridge.h | 8 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/amd/picasso/aoac.c b/src/soc/amd/picasso/aoac.c index f31afbf808..1f7dcb02e4 100644 --- a/src/soc/amd/picasso/aoac.c +++ b/src/soc/amd/picasso/aoac.c @@ -29,7 +29,7 @@ const static int aoac_devs[] = { FCH_AOAC_DEV_ESPI, }; -void power_on_aoac_device(int dev) +void power_on_aoac_device(unsigned int dev) { uint8_t byte; @@ -41,7 +41,7 @@ void power_on_aoac_device(int dev) aoac_write8(AOAC_DEV_D3_CTL(dev), byte); } -void power_off_aoac_device(int dev) +void power_off_aoac_device(unsigned int dev) { uint8_t byte; @@ -51,7 +51,7 @@ void power_off_aoac_device(int dev) aoac_write8(AOAC_DEV_D3_CTL(dev), byte); } -bool is_aoac_device_enabled(int dev) +bool is_aoac_device_enabled(unsigned int dev) { uint8_t byte; @@ -63,7 +63,7 @@ bool is_aoac_device_enabled(int dev) return false; } -void wait_for_aoac_enabled(int dev) +void wait_for_aoac_enabled(unsigned int dev) { while (!is_aoac_device_enabled(dev)) udelay(100); @@ -71,7 +71,7 @@ void wait_for_aoac_enabled(int dev) void enable_aoac_devices(void) { - int i; + unsigned int i; for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) power_on_aoac_device(aoac_devs[i]); diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index 168b2b2e22..547f602db7 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -269,10 +269,10 @@ typedef struct aoac_devs { } __packed aoac_devs_t; void enable_aoac_devices(void); -bool is_aoac_device_enabled(int dev); -void power_on_aoac_device(int dev); -void power_off_aoac_device(int dev); -void wait_for_aoac_enabled(int dev); +bool is_aoac_device_enabled(unsigned int dev); +void power_on_aoac_device(unsigned int dev); +void power_off_aoac_device(unsigned int dev); +void wait_for_aoac_enabled(unsigned int dev); void sb_clk_output_48Mhz(void); void sb_enable(struct device *dev); void southbridge_final(void *chip_info); |