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Diffstat (limited to 'src/soc/amd/phoenix')
-rw-r--r--src/soc/amd/phoenix/root_complex.c30
1 files changed, 14 insertions, 16 deletions
diff --git a/src/soc/amd/phoenix/root_complex.c b/src/soc/amd/phoenix/root_complex.c
index 82216aec7e..3e61df1a01 100644
--- a/src/soc/amd/phoenix/root_complex.c
+++ b/src/soc/amd/phoenix/root_complex.c
@@ -116,10 +116,9 @@ struct dptc_input {
* | DRAM |
* +--------------------------------+ 0x0
*/
-static void read_resources(struct device *dev)
+void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
{
uint32_t mem_usable = (uintptr_t)cbmem_top();
- unsigned long idx = 0;
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
@@ -127,38 +126,35 @@ static void read_resources(struct device *dev)
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
- /* The root complex has no PCI BARs implemented, so there's no need to call
- pci_dev_read_resources for it */
-
- fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
+ fixed_io_range_reserved(dev, (*idx)++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 - 0x9ffff */
- ram_range(dev, idx++, 0, 0xa0000);
+ ram_range(dev, (*idx)++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
- mmio_range(dev, idx++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
+ mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
- reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
+ reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
- ram_from_to(dev, idx++, 1 * MiB, early_reserved_dram_start);
+ ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
- reserved_ram_from_to(dev, idx++, early_reserved_dram_start, early_reserved_dram_end);
+ reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
- ram_from_to(dev, idx++, early_reserved_dram_end, mem_usable);
+ ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
- mmconf_resource(dev, idx++);
+ mmconf_resource(dev, (*idx)++);
/* Reserve fixed IOMMU MMIO region */
- mmio_range(dev, idx++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
+ mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
- read_fsp_resources(dev, &idx);
+ read_fsp_resources(dev, idx);
}
static void root_complex_init(struct device *dev)
@@ -205,7 +201,9 @@ static const char *gnb_acpi_name(const struct device *dev)
}
struct device_operations phoenix_root_complex_operations = {
- .read_resources = read_resources,
+ /* The root complex has no PCI BARs implemented, so there's no need to call
+ pci_dev_read_resources for it */
+ .read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = root_complex_init,