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-rw-r--r--src/northbridge/intel/sandybridge/romstage.c6
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h1
2 files changed, 0 insertions, 7 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index c76d2f4f4a..079e1b13ba 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -63,17 +63,11 @@ void mainboard_romstage_entry(void)
/* Init LPC, GPIO, BARs, disable watchdog ... */
early_pch_init();
- /* Initialize superio */
- mainboard_config_superio();
-
/* USB is initialized in MRC if MRC is used. */
if (CONFIG(USE_NATIVE_RAMINIT)) {
early_usb_init(mainboard_usb_ports);
}
- /* Initialize console device(s) */
- console_init();
-
/* Perform some early chipset initialization required
* before RAM initialization can work
*/
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index cfda2e838b..dff943dd92 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -215,7 +215,6 @@ void early_init_dmi(void);
/* mainboard_early_init: Optional mainboard callback run after console init
but before raminit. */
void mainboard_early_init(int s3resume);
-void mainboard_config_superio(void);
int mainboard_should_reset_usb(int s3resume);
void perform_raminit(int s3resume);
enum platform_type get_platform_type(void);