3 files changed, 10 insertions, 7 deletions
diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
index d80ddf3efb..29613a92f4 100644
--- a/src/northbridge/intel/e7505/Kconfig
+++ b/src/northbridge/intel/e7505/Kconfig
@@ -23,6 +23,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	select NO_MMCONF_SUPPORT
 	select HAVE_DEBUG_RAM_SETUP
 	select RELOCATABLE_RAMSTAGE
+	select POSTCAR_STAGE
 
 config HW_SCRUBBER
 	bool
diff --git a/src/northbridge/intel/e7505/Makefile.inc b/src/northbridge/intel/e7505/Makefile.inc
index 57c870fde4..7f7c5e40aa 100644
--- a/src/northbridge/intel/e7505/Makefile.inc
+++ b/src/northbridge/intel/e7505/Makefile.inc
@@ -6,4 +6,6 @@ ramstage-y += memmap.c
 romstage-y += raminit.c
 romstage-y += debug.c
 romstage-y += memmap.c
+
+postcar-y += memmap.c
 endif
diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c
index 4a80608e81..48527fdd96 100644
--- a/src/northbridge/intel/e7505/memmap.c
+++ b/src/northbridge/intel/e7505/memmap.c
@@ -37,9 +37,10 @@ void *cbmem_top(void)
 
 #define ROMSTAGE_RAM_STACK_SIZE 0x5000
 
-/* setup_stack_and_mtrrs() determines the stack to use after
- * cache-as-ram is torn down as well as the MTRR settings to use. */
-void *setup_stack_and_mtrrs(void)
+/* platform_enter_postcar() determines the stack to use after
+ * cache-as-ram is torn down as well as the MTRR settings to use,
+ * and continues execution in postcar stage. */
+void platform_enter_postcar(void)
 {
 	struct postcar_frame pcf;
 	uintptr_t top_of_ram;
@@ -59,8 +60,7 @@ void *setup_stack_and_mtrrs(void)
 	postcar_frame_add_mtrr(&pcf, top_of_ram - 8*MiB, 8*MiB,
 		MTRR_TYPE_WRBACK);
 
-	/* Save the number of MTRRs to setup. Return the stack location
-	 * pointing to the number of MTRRs.
-	 */
-	return postcar_commit_mtrrs(&pcf);
+	run_postcar_phase(&pcf);
+
+	/* We do not return here. */
 }