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-rw-r--r--src/northbridge/intel/haswell/haswell_mrc/raminit.c2
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/haswell/haswell_mrc/raminit.c b/src/northbridge/intel/haswell/haswell_mrc/raminit.c
index 5336769404..7adae9e64c 100644
--- a/src/northbridge/intel/haswell/haswell_mrc/raminit.c
+++ b/src/northbridge/intel/haswell/haswell_mrc/raminit.c
@@ -261,7 +261,7 @@ static void setup_sdram_meminfo(struct pei_data *pei_data)
dimm->mod_id =
(pei_data->spd_data[index][SPD_DIMM_MOD_ID2] << 8) |
(pei_data->spd_data[index][SPD_DIMM_MOD_ID1] & 0xff);
- dimm->mod_type = DDR3_SPD_SODIMM;
+ dimm->mod_type = SPD_DDR3_DIMM_TYPE_SO_DIMM;
dimm->bus_width = MEMORY_BUS_WIDTH_64;
dimm_cnt++;
}
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index a308d07305..aec300b5ef 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -433,7 +433,7 @@ static void setup_sdram_meminfo(struct pei_data *pei_data)
dimm->mod_id = /* bytes 117/118 */
(pei_data->spd_data[0][SPD_DIMM_MOD_ID2] << 8) |
(pei_data->spd_data[0][SPD_DIMM_MOD_ID1] & 0xFF);
- dimm->mod_type = DDR3_SPD_SODIMM;
+ dimm->mod_type = SPD_DDR3_DIMM_TYPE_SO_DIMM;
dimm->bus_width = MEMORY_BUS_WIDTH_64;
dimm_cnt++;
}
@@ -457,7 +457,7 @@ static void setup_sdram_meminfo(struct pei_data *pei_data)
dimm->mod_id = /* bytes 117/118 */
(pei_data->spd_data[0][SPD_DIMM_MOD_ID2] << 8) |
(pei_data->spd_data[0][SPD_DIMM_MOD_ID1] & 0xFF);
- dimm->mod_type = DDR3_SPD_SODIMM;
+ dimm->mod_type = SPD_DDR3_DIMM_TYPE_SO_DIMM;
dimm->bus_width = MEMORY_BUS_WIDTH_64;
dimm_cnt++;
}