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-rw-r--r--src/northbridge/intel/haswell/Kconfig13
-rw-r--r--src/northbridge/intel/haswell/Makefile.inc7
-rw-r--r--src/northbridge/intel/haswell/native_raminit/Makefile.inc3
-rw-r--r--src/northbridge/intel/haswell/native_raminit/raminit_native.c15
4 files changed, 37 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 50acb09a91..b659bf6d98 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -9,6 +9,14 @@ config NORTHBRIDGE_INTEL_HASWELL
if NORTHBRIDGE_INTEL_HASWELL
+config USE_NATIVE_RAMINIT
+ bool "[NOT WORKING] Use native raminit"
+ default n
+ select HAVE_DEBUG_RAM_SETUP
+ help
+ Select if you want to use coreboot implementation of raminit rather than
+ MRC.bin. Currently incomplete and does not boot.
+
config HASWELL_VBOOT_IN_BOOTBLOCK
depends on VBOOT
bool "Start verstage in bootblock"
@@ -45,6 +53,7 @@ config DCACHE_RAM_BASE
config DCACHE_RAM_SIZE
hex
+ default 0x40000 if USE_NATIVE_RAMINIT
default 0x10000
help
The size of the cache-as-ram region required during bootblock
@@ -53,12 +62,14 @@ config DCACHE_RAM_SIZE
config DCACHE_RAM_MRC_VAR_SIZE
hex
+ default 0x0 if USE_NATIVE_RAMINIT
default 0x30000
help
The amount of cache-as-ram region required by the reference code.
config DCACHE_BSP_STACK_SIZE
hex
+ default 0x20000 if USE_NATIVE_RAMINIT
default 0x2000
help
The amount of anticipated stack usage in CAR by bootblock and
@@ -66,6 +77,7 @@ config DCACHE_BSP_STACK_SIZE
config HAVE_MRC
bool "Add a System Agent binary"
+ depends on !USE_NATIVE_RAMINIT
help
Select this option to add a System Agent binary to
the resulting coreboot image.
@@ -82,6 +94,7 @@ config MRC_FILE
config HASWELL_HIDE_PEG_FROM_MRC
bool "Hide PEG devices from MRC to work around hardcoded MRC behavior"
+ depends on !USE_NATIVE_RAMINIT
default y
help
If set, hides all PEG devices from MRC. This allows the iGPU
diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
index 2d1532be05..329f1f7ffe 100644
--- a/src/northbridge/intel/haswell/Makefile.inc
+++ b/src/northbridge/intel/haswell/Makefile.inc
@@ -19,6 +19,11 @@ romstage-y += report_platform.c
postcar-y += memmap.c
-subdirs-y += haswell_mrc
+ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
+subdirs-y += native_raminit
+
+else
+subdirs-y += haswell_mrc
+endif
endif
diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
new file mode 100644
index 0000000000..8cfb4fb33e
--- /dev/null
+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
@@ -0,0 +1,3 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+romstage-y += raminit_native.c
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
new file mode 100644
index 0000000000..1aafdf8659
--- /dev/null
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <console/console.h>
+#include <northbridge/intel/haswell/raminit.h>
+
+void perform_raminit(const int s3resume)
+{
+ /*
+ * See, this function's name is a lie. There are more things to
+ * do that memory initialisation, but they are relatively easy.
+ */
+
+ /** TODO: Implement the required magic **/
+ die("NATIVE RAMINIT: More Magic (tm) required.\n");
+}