3 files changed, 11 insertions, 7 deletions
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index d9dbdc9d46..610f7856ea 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -29,6 +29,8 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
 	select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
 	select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
 	select CACHE_MRC_SETTINGS
+	select POSTCAR_STAGE
+	select POSTCAR_CONSOLE
 
 config CBFS_SIZE
 	hex
diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc
index 1f7e483f61..3118b0980e 100644
--- a/src/northbridge/intel/x4x/Makefile.inc
+++ b/src/northbridge/intel/x4x/Makefile.inc
@@ -29,4 +29,6 @@ ramstage-y += ram_calc.c
 ramstage-y += gma.c
 ramstage-y += northbridge.c
 
+postcar-y += ram_calc.c
+
 endif
diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/ram_calc.c
index d5743e3733..49afdc3b69 100644
--- a/src/northbridge/intel/x4x/ram_calc.c
+++ b/src/northbridge/intel/x4x/ram_calc.c
@@ -105,9 +105,10 @@ void *cbmem_top(void)
 
 #define ROMSTAGE_RAM_STACK_SIZE 0x5000
 
-/* setup_stack_and_mtrrs() determines the stack to use after
- * cache-as-ram is torn down as well as the MTRR settings to use. */
-void *setup_stack_and_mtrrs(void)
+/* platform_enter_postcar() determines the stack to use after
+ * cache-as-ram is torn down as well as the MTRR settings to use,
+ * and continues execution in postcar stage. */
+void platform_enter_postcar(void)
 {
 	struct postcar_frame pcf;
 	uintptr_t top_of_ram;
@@ -130,8 +131,7 @@ void *setup_stack_and_mtrrs(void)
 	postcar_frame_add_mtrr(&pcf, top_of_ram - 4*MiB, 4*MiB, MTRR_TYPE_WRBACK);
 	postcar_frame_add_mtrr(&pcf, top_of_ram - 8*MiB, 4*MiB, MTRR_TYPE_WRBACK);
 
-	/* Save the number of MTRRs to setup. Return the stack location
-	 * pointing to the number of MTRRs.
-	 */
-	return postcar_commit_mtrrs(&pcf);
+	run_postcar_phase(&pcf);
+
+	/* We do not return here. */
 }