diff options
Diffstat (limited to 'src/northbridge/amd/pi')
-rw-r--r-- | src/northbridge/amd/pi/00730F01/chipset.cb | 26 | ||||
-rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 9 |
2 files changed, 14 insertions, 21 deletions
diff --git a/src/northbridge/amd/pi/00730F01/chipset.cb b/src/northbridge/amd/pi/00730F01/chipset.cb index 2ddfcebbf4..57f89c4870 100644 --- a/src/northbridge/amd/pi/00730F01/chipset.cb +++ b/src/northbridge/amd/pi/00730F01/chipset.cb @@ -1,22 +1,20 @@ # SPDX-License-Identifier: GPL-2.0-only -chip northbridge/amd/pi/00730F01/root_complex +chip northbridge/amd/pi/00730F01 device cpu_cluster 0 on end device domain 0 on - chip northbridge/amd/pi/00730F01 - device pci 0.0 alias gnb on end - device pci 0.2 alias iommu off end - device pci 1.0 alias gfx off end - device pci 1.1 alias gfx_hda off end - device pci 2.0 on end # Dummy Host Bridge, do not disable - device pci 2.1 alias gpp_bridge_0 off end - device pci 2.2 alias gpp_bridge_1 off end - device pci 2.3 alias gpp_bridge_2 off end - device pci 2.4 alias gpp_bridge_3 off end - device pci 2.5 alias gpp_bridge_4 off end - device pci 8.0 alias psp on end - end + device pci 0.0 alias gnb on end + device pci 0.2 alias iommu off end + device pci 1.0 alias gfx off end + device pci 1.1 alias gfx_hda off end + device pci 2.0 on end # Dummy Host Bridge, do not disable + device pci 2.1 alias gpp_bridge_0 off end + device pci 2.2 alias gpp_bridge_1 off end + device pci 2.3 alias gpp_bridge_2 off end + device pci 2.4 alias gpp_bridge_3 off end + device pci 2.5 alias gpp_bridge_4 off end + device pci 8.0 alias psp on end chip southbridge/amd/pi/hudson device pci 10.0 alias xhci off end diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index bafe5a5810..e8f7abdc31 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -695,12 +695,6 @@ static void fam16_finalize(void *chip_info) } } -struct chip_operations northbridge_amd_pi_00730F01_ops = { - CHIP_NAME("AMD FAM16 Northbridge") - .enable_dev = 0, - .final = fam16_finalize, -}; - #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info { unsigned int hole_startk; @@ -886,9 +880,10 @@ static void root_complex_enable_dev(struct device *dev) } } -struct chip_operations northbridge_amd_pi_00730F01_root_complex_ops = { +struct chip_operations northbridge_amd_pi_00730F01_ops = { CHIP_NAME("AMD FAM16 Root Complex") .enable_dev = root_complex_enable_dev, + .final = fam16_finalize, }; /********************************************************************* |