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-rw-r--r--src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c10
1 files changed, 1 insertions, 9 deletions
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
index c8d5e33cbc..cec5070a10 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
-#include <device/pnp_ops.h>
+#include <device/pnp_type.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
@@ -12,7 +12,6 @@
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/pei_data.h>
-#define GLOBAL_DEV PNP_DEV(0x2e, 0)
#define SERIAL_DEV PNP_DEV(0x2e, NCT6779D_SP2)
const struct southbridge_usb_port mainboard_usb_ports[] = {
@@ -35,13 +34,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
void bootblock_mainboard_early_init(void)
{
- /* Setup COM/UART */
- nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
-
- /* TODO / FIXME: Setup Multifuncion/SIO pins for COM */
-
- pnp_set_logical_device(SERIAL_DEV);
- nuvoton_pnp_exit_conf_state(GLOBAL_DEV);
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}