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-rwxr-xr-xsrc/mainboard/google/lars/gpio.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/lars/gpio.h b/src/mainboard/google/lars/gpio.h
index 3aebebc0aa..acb04ec01d 100755
--- a/src/mainboard/google/lars/gpio.h
+++ b/src/mainboard/google/lars/gpio.h
@@ -57,10 +57,10 @@
/* Pad configuration in ramstage. */
static const struct pad_config gpio_table[] = {
/* EC_PCH_RCIN */ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
-/* LPC_LAD_0 */ PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
-/* LPC_LAD_1 */ PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
-/* LPC_LAD_2 */ PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
-/* LPC_LAD_3 */ PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
+/* LPC_LAD_0 */ PAD_CFG_NF(GPP_A1, 20K_PU, DEEP, NF1),
+/* LPC_LAD_1 */ PAD_CFG_NF(GPP_A2, 20K_PU, DEEP, NF1),
+/* LPC_LAD_2 */ PAD_CFG_NF(GPP_A3, 20K_PU, DEEP, NF1),
+/* LPC_LAD_3 */ PAD_CFG_NF(GPP_A4, 20K_PU, DEEP, NF1),
/* LPC_FRAME */ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
/* LPC_SERIRQ */ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
/* PIRQA# */ /* GPP_A7 */