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-rw-r--r--src/mainboard/google/octopus/variants/baseboard/devicetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index 784dc9a158..aee8668a54 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -33,6 +33,13 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_95_64"
register "gpe0_dw3" = "PMC_GPE_NW_31_0"
+ # PL1 override 8000 mW: Due to error in the energy calculation for
+ # current VR solution. Experiments show that SoC TDP max (6W) can
+ # be reached when RAPL PL1 is set to 8W.
+ register "tdp_pl1_override_mw" = "8000"
+ # Set RAPL PL2 to 15W.
+ register "tdp_pl2_override_mw" = "15000"
+
# Minimum SLP S3 assertion width 28ms.
register "slp_s3_assertion_width_usecs" = "28000"