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-rw-r--r--src/mainboard/apple/macbookair4_2/Makefile.inc4
-rw-r--r--src/mainboard/apple/macbookair4_2/early_southbridge.c15
-rw-r--r--src/mainboard/apple/macbookair4_2/spd.binbin0 -> 1024 bytes
3 files changed, 14 insertions, 5 deletions
diff --git a/src/mainboard/apple/macbookair4_2/Makefile.inc b/src/mainboard/apple/macbookair4_2/Makefile.inc
index 6064cea986..555581cc4d 100644
--- a/src/mainboard/apple/macbookair4_2/Makefile.inc
+++ b/src/mainboard/apple/macbookair4_2/Makefile.inc
@@ -1,3 +1,7 @@
romstage-y += early_southbridge.c
romstage-y += gpio.c
ramstage-y += gnvs.c
+
+cbfs-files-y += spd.bin
+spd.bin-file := spd.bin
+spd.bin-type := spd
diff --git a/src/mainboard/apple/macbookair4_2/early_southbridge.c b/src/mainboard/apple/macbookair4_2/early_southbridge.c
index e1b667d54d..576262d601 100644
--- a/src/mainboard/apple/macbookair4_2/early_southbridge.c
+++ b/src/mainboard/apple/macbookair4_2/early_southbridge.c
@@ -15,6 +15,7 @@
#include "southbridge/intel/bd82x6x/gpio.h"
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
+#include <cbfs.h>
void pch_enable_lpc(void)
{
@@ -51,11 +52,15 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 0, -1 },
};
-/* FIXME: Put proper SPD map here. */
void mainboard_get_spd(spd_raw_data *spd)
{
- read_spd(&spd[0], 0x50);
- read_spd(&spd[1], 0x51);
- read_spd(&spd[2], 0x52);
- read_spd(&spd[3], 0x53);
+ void *spd_file;
+ size_t spd_file_len = 0;
+ spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
+ &spd_file_len);
+ if (spd_file && spd_file_len >= 1024) {
+ int i;
+ for (i = 0; i < 4; i++)
+ memcpy(&spd[i], spd_file + 256 * i, 128);
+ }
}
diff --git a/src/mainboard/apple/macbookair4_2/spd.bin b/src/mainboard/apple/macbookair4_2/spd.bin
new file mode 100644
index 0000000000..6e2738ff21
--- /dev/null
+++ b/src/mainboard/apple/macbookair4_2/spd.bin
Binary files differ