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-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb3
-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb3
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
index 3e60ed946b..18aa65d890 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
@@ -70,6 +70,9 @@ chip soc/intel/cannonlake
# GPIO for SD card detect
register "sdcard_cd_gpio" = "GPP_G5"
+ # Enable S0ix
+ register "s0ix_enable" = "1"
+
# Audio
register "i2c[3]" = "{
.speed = I2C_SPEED_STANDARD,
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
index 8502048880..6dd1893948 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb
@@ -68,6 +68,9 @@ chip soc/intel/cannonlake
# GPIO for SD card detect
register "sdcard_cd_gpio" = "GPP_G5"
+ # Enable S0ix
+ register "s0ix_enable" = "1"
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device