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-rw-r--r--src/mainboard/emulation/qemu-riscv/memlayout.ld1
-rw-r--r--src/mainboard/emulation/spike-riscv/memlayout.ld3
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 615d1f2b72..8cc6d4126b 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -24,5 +24,6 @@ SECTIONS
ROMSTAGE(0x20000, 128K)
STACK(0x40000, 0x3ff00)
PRERAM_CBMEM_CONSOLE(0x80000, 8K)
+ PAGETABLES(0x80000+8K, 60K)
RAMSTAGE(0x100000, 16M)
}
diff --git a/src/mainboard/emulation/spike-riscv/memlayout.ld b/src/mainboard/emulation/spike-riscv/memlayout.ld
index 8d35a64a9c..8596723796 100644
--- a/src/mainboard/emulation/spike-riscv/memlayout.ld
+++ b/src/mainboard/emulation/spike-riscv/memlayout.ld
@@ -23,7 +23,8 @@ SECTIONS
{
DRAM_START(START)
BOOTBLOCK(START, 64K)
- STACK(START + 8M, 64K)
+ STACK(START + 8M, 4K)
+ PAGETABLES(START + 8M + 4K, 60K)
ROMSTAGE(START + 8M + 64K, 128K)
PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K)
RAMSTAGE(START + 8M + 200K, 256K)