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-rw-r--r--src/mainboard/google/hatch/variants/genesis/gpio.c28
1 files changed, 23 insertions, 5 deletions
diff --git a/src/mainboard/google/hatch/variants/genesis/gpio.c b/src/mainboard/google/hatch/variants/genesis/gpio.c
index a095da1e11..cb5c89b89e 100644
--- a/src/mainboard/google/hatch/variants/genesis/gpio.c
+++ b/src/mainboard/google/hatch/variants/genesis/gpio.c
@@ -9,6 +9,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_A16, NONE, DEEP),
/* A18 : LAN_PE_ISOLATE_ODL */
PAD_CFG_GPO(GPP_A18, 1, DEEP),
+ /* A19 : PCH_PCON0_PDB_ODL */
+ PAD_CFG_GPO(GPP_A19, 1, DEEP),
+ /* A20 : LAN_I350_WAKE# */
+ PAD_CFG_GPI_IRQ_WAKE(GPP_A20, NONE, DEEP, LEVEL, INVERT),
/* A23 : M2_WLAN_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A23, NONE, PLTRST, LEVEL, INVERT),
@@ -29,23 +33,33 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
/* C1 : SMBDATA */
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
+ /* C3 : PCH_MBCLK1_R (i350) */
+ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
+ /* C4 : PCH_MBDAT1_R (i350) */
+ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
/* C6: M2_WLAN_WAKE_ODL */
PAD_CFG_GPI_SCI_LOW(GPP_C6, NONE, DEEP, EDGE_SINGLE),
/* C7 : LAN_WAKE_ODL */
PAD_CFG_GPI_SCI_LOW(GPP_C7, NONE, DEEP, EDGE_SINGLE),
/* C10 : PCH_PCON_RST_ODL */
PAD_CFG_GPO(GPP_C10, 1, DEEP),
- /* C11 : PCH_PCON_PDB_ODL */
+ /* C11 : PCH_PCON1_PDB_ODL */
PAD_CFG_GPO(GPP_C11, 1, DEEP),
/* C15 : WLAN_OFF_L */
PAD_CFG_GPO(GPP_C15, 1, DEEP),
- /* E2 : EN_PP_MST_OD */
- PAD_CFG_GPO(GPP_E2, 1, DEEP),
- /* E9 : USB_A0_OC_ODL */
- PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
+ /* E2 : Not connected */
+ PAD_NC(GPP_E2, NONE),
+ /* E3 : TPU_RST_PIN40 */
+ PAD_CFG_GPO(GPP_E3, 1, DEEP),
+ /* E7 : TPU_RST_PIN42 */
+ PAD_CFG_GPO(GPP_E7, 1, DEEP),
+ /* E9 : PU 10K to PP3300_SOC_A */
+ PAD_NC(GPP_E9, NONE),
/* E10 : USB_A1_OC_ODL */
PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
+ /* E15 : PCH_TYPEC_UPFB */
+ PAD_CFG_GPI(GPP_E15, NONE, DEEP),
/* F11 : EMMC_CMD */
PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1),
@@ -76,6 +90,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
/* H5: PCH_I2C_PCON_SCL */
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
+ /* H6 : PCH_I2C_TPU_SDA */
+ PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
+ /* H7 : PCH_I2C_TPU_SCL */
+ PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
/* H22 : PWM_PP3300_BIOZZER */
PAD_CFG_GPO(GPP_H22, 0, DEEP),
};