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-rw-r--r--src/mainboard/tyan/s8226/BiosCallOuts.c1
-rw-r--r--src/mainboard/tyan/s8226/reset.c7
-rw-r--r--src/mainboard/tyan/s8226/romstage.c1
3 files changed, 4 insertions, 5 deletions
diff --git a/src/mainboard/tyan/s8226/BiosCallOuts.c b/src/mainboard/tyan/s8226/BiosCallOuts.c
index 8cb5b5c98c..0d6e175f5a 100644
--- a/src/mainboard/tyan/s8226/BiosCallOuts.c
+++ b/src/mainboard/tyan/s8226/BiosCallOuts.c
@@ -25,7 +25,6 @@
#include "heapManager.h"
#include <northbridge/amd/agesa/family15/dimmSpd.h>
#include <arch/io.h>
-#include <arch/romcc_io.h>
#ifdef __PRE_RAM__
/* These defines are used to select the appropriate socket for the SPD read
diff --git a/src/mainboard/tyan/s8226/reset.c b/src/mainboard/tyan/s8226/reset.c
index 46f97ec071..7a96aa4595 100644
--- a/src/mainboard/tyan/s8226/reset.c
+++ b/src/mainboard/tyan/s8226/reset.c
@@ -17,10 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-
+#ifndef __PRE_RAM__
+#define __PRE_RAM__ // Use simple device model for this file even in ramstage
+#endif
+#include <arch/io.h>
#include <reset.h>
-#include <arch/io.h> /*inb, outb*/
-#include <arch/romcc_io.h> /*pci_read_config32, device_t, PCI_DEV*/
#define HT_INIT_CONTROL 0x6C
#define HTIC_BIOSR_Detect (1<<5)
diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c
index 02f0c3727d..ee16ceb57f 100644
--- a/src/mainboard/tyan/s8226/romstage.c
+++ b/src/mainboard/tyan/s8226/romstage.c
@@ -21,7 +21,6 @@
#include <reset.h>
#include <stdint.h>
#include <arch/io.h>
-#include <arch/romcc_io.h>
#include <arch/cpu.h>
#include <console/console.h>
#include <arch/stages.h>